RF Technology 50A 25 - 50 MHz Base Station Transceiver User Manual Exciter operations manual

RF Technology Pty Ltd 25 - 50 MHz Base Station Transceiver Exciter operations manual

Exciter operations manual

Eclipse SeriesRF Technologyrfinfo@rftechnology.com.auNovember, 2001T50 TransmitterOperation and Maintenance ManualThis manual is produced by RF Technology Pty Ltd10/8 Leighton Place, Hornsby NSW 2077 AustraliaCopyright © 2001 RF Technology
Page 2 RF Technology T50 CONTENTS CONTENTSContents1 Operating Instructions 51.1 Front Panel Controls and Indicators 51.1.1 PTT 51.1.2 Line 51.1.3 POWER LED 61.1.4 TX LED 61.1.5 ALARM LED 62 Transmitter Internal Jumper Options 72.1 Serial I/O Parameters 72.2 Line Terminators 72.3 Exciter Low Battery Level 72.4 External PA Parameters 72.5 LOOP Volts Select 72.6 Direct Audio (TONE) Select 82.7 Direct Audio (TONE) High Pass Filter Select 82.8 Transmit Time 82.9 Channel Selectable Parameters 83 Transmitter I/O Connections 83.1 25 Pin Connector 83.2 9 Pin Front Panel Connector 94 Channel and Tone Frequency Programming 104.1 Setting Options 104.2 Setting Channel Parameters 115 Circuit Description 135.1 T50 Master Schematic (Sheet 1) 135.2 Microprocessor (Sheet 2) 135.3 Audio Processing Section (Sheet 3) 135.4 Line Input Processing Section (Sheet 4) 135.5 Tone Generation Section (Sheet 5) 205.6 Frequency Synthesiser (Sheet 6) 215.6.1 The Modulation PLL 215.6.2 The Channel PLL 225.6.3 The External Reference Divider 235.6.4 The DAC 235.6.5 The VCOs and the RF Output 245.7 Voltage Controlled Oscillators (Sheet 7) 245.8 1W Broadband HF Power Amplifier (Sheet 8) 265.9 Power Generation Section (Sheet 9) 266 Field Alignment Procedure 276.1 Standard Test Equipment 276.2 Invoking the Calibration Procedure 286.3 The “Miscellaneous” Calibration Procedure 286.4 The “Reference” Calibration Procedure 29
RF Technology T50 Page 3CONTENTS CONTENTS6.5 The “Deviation” Calibration Procedure 316.6 The “Tone Deviation” Calibration Procedure 326.7 The “Line” Calibration Procedure 336.8 The “Power” Calibration Procedure 347 Specifications 367.1 Overall Description 367.1.1 Channel Capacity 367.1.2 CTCSS 377.1.3 Channel Programming 377.1.4 Channel Selection 377.1.5 Microprocessor 387.2 Physical Configuration 387.3 Front Panel Controls, Indicators and Test Points 387.3.1 Controls 387.3.2 Indicators 387.3.3 Test Points 387.4 Electrical Specifications 387.4.1 Power Requirements 387.4.2 Frequency Range and Channel Spacing 397.4.3 Frequency Synthesizer Step Size 397.4.4 Frequency Stability 397.4.5 Number of Channels 397.4.6 Antenna Impedance 397.4.7 Output Power 397.4.8 Transmit Duty Cycle 397.4.9 Spurious and Harmonics 397.4.10 Carrier and Modulation Attack Time 407.4.11 Modulation 407.4.12 Distortion 407.4.13 Residual Modulation and Noise 407.4.14 600Ω Line Input Sensitivity 407.4.15 Test Microphone Input 407.4.16 External Tone Input 407.4.17 T/R Relay Driver 407.4.18 Channel Select Input / Output 417.4.19 DC Remote Keying 417.4.20 PTT in 417.4.21 Programmable No-Tone Period 417.4.22 Firmware Timers 417.4.23 CTCSS 427.5 Connectors 427.5.1 RF Output Connector 427.5.2 Power and I/O Connector 427.5.3 External Reference Connector (optional) 42
Page 4 RF Technology T501. CONTENTS CONTENTSA Engineering Diagrams 43A.1 Block Diagram 43A.2 Circuit Diagrams 43A.3 Component Overlay Diagrams 43B Parts List 44C EIA CTCSS Tones 60
RF Technology T50 Page 51 OPERATING INSTRUCTIONS1 Operating Instructions1.1 Front Panel Controls and Indicators1.1.1 PTTA front-panel push-to-talk (PTT) button is provided to facilitate bench and field testsand adjustments. The button is a momentary action type. When keyed, audio from theline input is disabled so that a carrier with subtone is transmitted. The front-panelmicrophone input is not enabled in this mode, but it is enabled when the PTT line onthat socket is pulled to ground.The PTT button has another function when transmission is keyed up, and the TX LEDlight is showing. If there is a “forward power low” alarm (the ALARM LED flashesthree times, then pauses), pressing this will cause the ALARM LED to flash 6, 7, 8, or 9times before the pause (see Table 2). This will indicate what has caused the low poweralarm.1.1.2 LineThe LINE trimpot is accessible by means of a small screwdriver from the front panel ofthe module. It is used to set the correct sensitivity of either line input or the directaudio input. It is factory preset to give 60% of rated deviation with an input of 0dBm(1mW on 600Ω equivalent to 775mV RMS or about 2.2V peak-to-peak) at 1kHz. Thenominal 60% deviation level may be adjusted by measuring between pins 6 and 1 on thetest socket, and adjusting the pot. By this means an input sensitivity from approximately-12dBm to +12dBm may be established.An internal, software selectable, option, provides an extra gain step of 20dB. This,effectively changes the input sensitivity to –32 to –8dBm.WARNINGChanges or modifications not expressly approved byRF Technology could void your authority to operate thisequipment. Specifications may vary from those given inthis document in accordance with requirements of localauthorities. RF Technology equipment is subject tocontinual improvement and RF Technology reserves theright to change performance and specification withoutfurther notice.
Page 6 RF Technology T501.1.3 Power Led 1 OPERATING INSTRUCTIONSLED Flash Cadence Fault Condition9 flashes, pause External PA failure8 flashes, pause Low dc supply on External PA7 flashes, pause External PA Over Current Condition6 flashes, pause External PA Over Temperature5 flashes, pause Synthesizer unlocked3 flashes, pause Unable to communicate with External PA2 flashes, pause The current channel is not programmed or the frequencyis out of range.1 flash, pause Low dc supply voltageLED ON continuously Transmitter timed outTable 1: Interpretations of LED flash cadence (TX LED Off)LED Flash Cadence Fault Condition9 flashes, pause External PA failure (if PTT is pressed)8 flashes, pause Low dc supply on External PA (if PTT is pressed)7 flashes, pause External PA Over Current Condition(if PTT is pressed)6 flashes, pause External PA Over Temperature(if PTT is pressed)4 flashes, pause Either PLL is near operational limit3 flashes, pause Forward Power Out of Range(if PTT is not pressed)2 flashes, pause Reverse Power ratio exceeded.1 flash, pause Low dc supply voltageLED ON continuously Transmitter timed outTable 2: Interpretations of LED flash cadence (TX LED On)1.1.3 POWER LEDThe PWR LED shows that the dc supply is connected to the receiver and that themicroprocessor is not being held in a RESET state.1.1.4 TX LEDThe TX LED illuminates when the transmitter is keyed. It will not illuminate (and anALARM cadence will be shown) if the synthesizer becomes unlocked, or the outputamplifier supply is interrupted by the microprocessor.1.1.5 ALARM LEDThe Alarm LED can indicate several fault conditions if they are detected by the self testprogram. The alarm indicator shows the highest priority fault present. See Tables 1and 2.
RF Technology T50 Page 72 TRANSMITTER INTERNAL JUMPER OPTIONS2 Transmitter OptionsThere are NO internal jumpers in the T50.There are many software selectable options. Some options are selected on a per channelbasis, and some are defined globally (i.e. the parameter is fixed irrespective of whichchannel is selected). Below is a description of these global parameters2.1 Serial I/O ParametersThere are two serial ports. There is the main serial port which is brought out to the frontpanel connector. This is referred to as PORT0. There is another serial port which is forfactory use only. It is referred to as PORT1.The baud rate, parity, and whether hardware flow control is enabled can be defined forPORT0. PORT0 is set by default to 57.6Kbps, with No parity, and No Hardware FlowControl.2.2 LINE TerminatorsThere are two main audio inputs, plus a direct audio (TONE) input. The direct audioinput is a High Impedance Balanced DC input, but the two audio inputs are AC coupled(> 10Hz) inputs which can be High Impedance(HiZ), or 600 ohm inputs. Each inputcan be software selected to be HiZ, or 600 ohms.2.3 Exciter Low Battery LevelThis is factory set to 24.0V, and defines the level of the DC supply that will cause anExciter dc supply low alarm.2.4 External PA ParametersThere are several user definable parameters associated with the external PA providedwith each exciter.These are the PA low battery alarm level (default is 26V), the PA Set Forward PowerLevel (defaults to 100W), the Forward Power Low Alarm Level (defaults to 90%), andthe Reverse Power Alarm Level (defaults to 25% - corresponding to a VSWR of 3:1).2.5 LOOP Volts SelectNormally the transmitter will key up if dc current is sensed flowing in either directionbetween Line1+ and Line1- (>=1mA). If this option is selected, then a 12Vdc supply is
Page 8 RF Technology T502.6 Direct Audio (TONE) Select 2 TRANSMITTER INTERNAL JUMPER OPTIONSapplied to the pair through 660 ohms of source impedance. (It would be expected,normally, that if this option is selected, then the option to remove the 600 terminatorfrom Line1, would also be selected). If dc current flows from having applied thispotential, then the transmitter will key up.2.6 Direct Audio (TONE) SelectNormally any signal applied to the TONE+/TONE- pair is ignored. If this option isselected then a Direct Audio input will be mixed with any audio received on either ofthe other two lines.2.7 Direct Audio (TONE) High Pass Filter SelectNormally the Direct Audio, and the CTCSS outputs are passed through a 250Hz, lowpass filter. This filter can be bypassed by selecting this option.2.8 Transmit TimeThis parameter defines a maximum time limit for continuous transmission. It isexpressed in seconds and can be arbitrarily large (months in fact). If it is set to zeroseconds, then the transmitter can stay keyed up permanently.2.9 Channel Selectable ParametersEach channel defines two complete set of parameters. One set of parameters is usedwhen a transmitter keys up from the PTT-in input, and the other set is used when thetransmitter keys up from the LOOP-in, the PTT switch, or the microphone PTT input.Each set defines what frequency to use, what CTCSS sub-tone (if any) to use, whatmaximum line deviation to use, what tone deviation to use, what transmit delay (a delayapplied from PTT-in or LOOP-in to transmission), what transmit tail (delay from PTT-in, or LOOP-in, to transmission being stopped, and No-TONE period (a period of extratransmission in which No Tone is applied after PTT-in or LOOP-in has been released.As well as these parameters, which Line (or Lines) can be selected, and whether theLines should have Flat frequency response or have Pre-emphasis applied. Also, it canEnable or disable the extra 20dB gain pad.Note that both Line1 and Line 2 can be selected (each with or without pre-emphasis),and if so, then the two signals will be mixed, and the Line potentiometer will adjust thelevel of them both.3 Transmitter I/O Connections3.1 25 Pin ConnectorThe female D-shell, 25 pin, connector is the main interface to the transmitter. The pinconnections are described in table 3.
RF Technology T50 Page 93 TRANSMITTER I/O CONNECTIONS 3.2 9 Pin Front Panel ConnectorFunction Signal Pins Specificationdc power +28Vdc(in)0 Vdc+5Vdc(out)+12Vdc(out)13, 251, 141715+24 to 32 VdcCommon VoltageOutput for external Logic(100mA)Output for an external relay(120mA)SerialCommunications SCLKMOSICH_ENPA_CSSPARE_SEL12618245Serial ClockBi-directional Data PinEnables Channel Select Shift RegisterEnables PA A/D chipSpare Select (for future use)600Ω/HiZ Line Line1+Line1- 819 Transformer Isolated Balanced 0dBmInput600Ω/HiZ Line Line2+Line2- 1022 Transformer Isolated Balanced 0dBmInputDirect PTT input 11 Ground to key PTTT/R Relay driveroutput 23 Open collector, 250mA /12VSub-Audible ToneInput Tone+Tone- 921 >10kΩ, dc coupledTable 3: Pin connections and explanations for the main 25-pin, D connector.3.2 9 Pin Front Panel ConnectorThe female D-shell, 9 pin, front panel connector is an RS232 interface for serialcommunications to a terminal, a terminal emulator, or to a computer. The pinconnections are described in table 4.Function Pins Specification Pin name on IBM PCTXD 2 Transmit Data (Output) RxDRXD 3 Receive Data (Input) TxDRTS 8 Request To Send (Output) CTSCTS 7 Clear To Send (Input) RTSDTR 6 Data Terminal Ready(Output) DSRDSR 1 Data Set Ready (Input) DCDGND 5 GND GNDTable 4: Pin connections for the front panel 9 pin D connector.The pinout for the connector has been chosen so that a straight-through BD9 male toDB9 female cable can connect the transmitter to any male DB9 serial port on an IBMPC compatible computer.Note that for connection to a modem, a cross-over cable will be required.
Page 10 RF Technology T504 CHANNEL PROGRAMMING AND OPTION SELECTION4 Channel Programming and Option SelectionChannel and tone frequency programming is most easily accomplished with RFTechnology Eclipse50 software. This software can be run on an IBM compatible PCand can be used to calibrate a T50, R50, and PA50 as well as program channelinformation. See the Eclipse 50 users manual for further information.But the T50 also has its own stand-alone high level interface, which can be accessedfrom a VT100 compatible terminal, or terminal emulator (such as HyperTerm which isavailable as a standard accessory with Windows).The pertinent aspects of this High Level Interface are described below.4.1 Setting OptionsNote that any text in italics, represents data output by the T50 firmware, rather thancommand line data sent to the T50 firmware.The T50, after powering up, will issue a command prompt of the form:T50>Via a terminal, or a terminal emulator, a user can type various commands in. The basiccommand to read parameters is:T50> read par parameter_nameWhere “parameter_name” is one of the following:Parameter Name Parameter Function Default Value ParameterRangeLOOP_GEN Generate a LOOP potential(see 2.5) Off Text: Off orOnPA_SET_FWD_PWR Output Power of the PA (see2.4) 100.0 (Watts) Floatingpoint number20.0 – 150.0PA_LOW_BAT Low Battery Alarm Level (see2.4) 26.0 (Volts) FloatingPointNumber< 32.0REV_PWR_ALARM Sets the maximum level ofreverse power. At this level ofreverse power, forward poweris automatically decreased sothat this reverse power level isnever exceeded. It also setsthe ratio of forward power,which if exceeded causes thereverse power alarm conditionto be asserted25.0 (% ofPA_SET_FWD_PWR)25.0 (% of currentforward power)FloatingPointNumber0.0 – 99.9
RF Technology T50 Page 114 CHANNEL PROGRAMMING AND OPTION SELECTIONParameter Name Parameter Function Default Value ParameterRangeLOW_PWR_ALARM Level of Output Power whenthe low power alarm conditionoccurs (see 2.4)90.0 (% ofPA_SET_FWD_PWR) FloatingPointNumber0.0 – 99.9TRANSMIT_TIME Maximum Time that thetransmitter can stay keyed up 0 (Seconds: Note thatzero seconds impliesno transmit time limit)Decimalnumber:0 - 9999999BAUD_RATE0 Port 0 Baud Rate 57600 (BPS) Decimalnumber:300 - 115200PARITY0 Port 0 Parity None Text: None,Even, or OddFLOW_CONTROL Port 0 Flow Control Off (“On” not yetavailable) Text: OffTable 5: Some User Defined Parameters.Note that the parameter names have been shown in upper case, but they can be typed inupper or lower case.A parameter can be changed, or added, by typingT50> set par parameter_name=parameter_valueAs for parameter names, the parameter value can be Upper or Lower case if it is a textvalue, as against a numeric value.4.2 Setting Channel ParametersOne can read the data from an existing channel by entering the command:T50> read chan chan_numberWhere chan_number is a number from 0 to 99.Entering new channel values, or modifying existing ones is possible from the commandline interface, but it is not recommended. It can be done by typing the following at acommand prompt:T50> set chan chan_number parameter_listWhere chan_number is a number from 0 to 99.The format of the parameter_list is quite complex. It has 14 fields. Each field can beseparated by a colon(:), comma(,), space, or tab.For example set chan 0 25.0,35.0,100.0,120.0,0,5,2,0,5,2,10,11,0,3
Page 12 RF Technology T504 CHANNEL PROGRAMMING AND OPTION SELECTIONField1: Transmit Frequency (in MHz) if PTT-in is asserted. This is 25.0 MHz in theexample.Field2: Transmit Frequency (in MHz) if the exciter is keyed up by anything but PTT-inbeing asserted. This is 35.0 MHz in the example.Field3: CTCSS Tone (in Hz) if PTT-in is asserted. This is 100Hz in the example.Field4: CTCSS Tone (in Hz) if the exciter is keyed up by anything but PTT-in beingasserted. This is 120Hz in the example.Fields 5,6,7: These define the start-up delay (in hundredths of a second), the transmittail (in seconds), and the no tone period (in tenths of a second) if the exciterkeys up from PTT-in being asserted.Fields 8,9,10: These define the start-up delay (in hundredths of a second), the transmittail (in seconds), and the no tone period (in tenths of a second), if the exciterkeys up from anything other than PTT-in being asserted.Field 11: Selects the line parameter if PTT-in being asserted caused the exciter to keyup. In the example it has disabled the 20dB gain pad, and enabled pre-emphasis on Line 2 (Line 1 is disabled).Field 12: Selects the line parameter if anything other than PTT-in being asserted causedthe exciter to key up. In the example it has disabled the 20dB gain pad, and itwould enable pre-emphasis on Line 1 and Line2 (i.e. audio on each input ismixed).Field 13: Selects the Tone deviation and the Maximum Line deviation if the exciterkeys up from PTT-in being asserted In the example, it has selected the defaultmaximum line deviation (5kHz), and the default tone deviation of 750Hz. (SeeTables 7 and 8)Field 14: Selects the Tone deviation and the Maximum Line deviation if the exciterkeys up from anything other than PTT-in being asserted. In the example, ithas selected a maximum deviation of 2.5kHz, and a maximum tone deviationof 375Hz. (See Tables 7 and 8)Least Significant BCD digit of Fields 13 or 14 Maximum Deviation0 5.0kHz1 4.0kHz2 3.0kHz3 2.5kHz4 2.0kHz5 1.5kHz6 User Specified(default: 4.5kHz)Table 7: Maximum Deviations
RF Technology T50 Page 134 CHANNEL PROGRAMMING AND OPTION SELECTIONMost Significant BCD digit of Fields 13 or 14 Nominal Tone Deviation0 750Hz1 500Hz2 375Hz3 250Hz4 150Hz5 User Specified (default: 600Hz)Table 8: Maximum Tone Deviations (when Max Dev is 5kHz)Note that the actual maximum tone deviations depend on the maximum deviations. If amaximum deviation of 4kHz was chosen, and a nominal tone deviation of 250 Hz, theactual maximum tone deviation would be 250*4.0/5.0 = 200Hz.If the Eclipse50 Software is not used to program the exciter, it is recommended that theprogramming information is prepared using a spreadsheet and/or a text editor, and theresulting file is then downloaded, as a text file, to the firmware using, for example,HyperTerm.Note that if using HyperTerm to download the text file, at 57600 bits per second orhigher speeds, the connection properties may need to be changed to add a 10millisecond delay after each line of text is sent.5 Circuit DescriptionThe following descriptions should be read as an aid to understanding the block andschematic diagrams given in the appendix of this manual.There are 9 sheets in the schematic in all.5.1 T50 Master Schematic (Sheet 1)Sheet 1, referred to as the “T50 Master Schematic”, is a top level sheet, showing fivecircuit blocks, and their interconnection with each other, as well as the interconnectionwith all connectors and external switches.JP12 is the connector, on the printed circuit board, for the microphone input.P3 represents the rear female DB25 connector.J1 is the nominal 1W RF output (BNC) connector, which is used to connect to theExternal Power Amplifier.J4 is an optional BNC connector for an external reference clock. If an externalreference clock, with power level from +5 to +26dBm is attached here, the firmwarewill automatically track the channel VCO to the reference.
Page 14 RF Technology T505 CIRCUIT DESCRIPTIONNote that the external reference frequency is limited to:500kHz, or any multipleany multiple of 128KHz greater than or equal to 4any multiple of 160KHz greater than or equal to 3P1 is the front panel DB9 RS-232 connector for attachment to a terminal, a terminalemulator, or to an IBM PC running the Eclipse50 software.JP2 is for the attachment of an LCD display module. This has been included for laterdevelopment.JP3 is a specialised connector for test and factory configuration use only.RV100 represents the front panel LINE potentiometer.SW1 represents the PTT test pin.D102, D103, and D104 represent the three front panel LEDs.5.2 Microprocessor (Sheet 2)Sheet 2 describes the basic microprocessor circuitry.The core CPU is the Motorola XC68HC12A0. It is configured in 8 bit data widthmode.The CPU is clocked by a 14.7456MHz crystal oscillator circuit (top left) comprising theJFET Q202, and two switching transistors Q203 and Q204.The CPU contains an 8 channel A/D converter whose inputs are identified as AN0,AN1, …, AN7.AN7 and AN6 are used as LOCK detect inputs from the two Phase Locked Loop (PLL)circuits (see 5.6)AN5 is used to sense whether or not the dc supply is within spec or not.AN4 is multiplexed between the LINE control potentiometer and the Channel referencecrystal’s temperature sense. Which analogue input drives this analogue input, is definedby the state of TEMP_LEVEL_IN which is a CPU output signal.AN3 and AN1 are inputs from the PLL circuits that sense the bias voltage on the VCOcontrol varactor for each VCO.AN2 is used to sense the average peak voltage of the audio input.AN0 is used to sense the average peak voltage of the RF output.
RF Technology T50 Page 155 CIRCUIT DESCRIPTIONFRDY is an output from the flash. It goes low when the Flash starts to write a byte ofdata, or erase a block, or erase the whole chip, and it returns to its default high statewhen the action requested has completed.FPSW1 is the switch input from the PTT Test pin.FPSW2, and FPSW3 are two pins that have been reserved for future use as switchinputs.LOOP/VOLTS_SEL is a CPU output that when high applies 12V of dc feed to theaudio output.TONE_DEV_U/D and TONE_DEV_INC are CPU outputs that are used to control thedigital potentiometer that sets the TONE deviation level. (see 5.5)EXT_TONE_SEL is a CPU output that when low enables differential analogue inputfrom the TONE+/TONE- pair. (see 5.5)LINEINP_ADSEL is a serial bus select pin. It selects the quad Digital to Analogueconverter (DAC) that sets the levels for the two Line input Voltage ControlledAmplifiers, the output RF power amplifier bias voltage, and the LCD bias circuit. (see5.4)LINEINP_DSEL is also a serial bus select pin. It is used to select the shift register thatis used to control most of the analogue switches in the audio Line input circuitry, aswell as the digital POT used to set the maximum deviation level. (See 5.4)PWR_CNTRL_HIGH is a CPU output that can be low, tri-state, or high. This adjusts,slightly, the range of the power amplifier bias circuitry allowing finer control of theoutput power level. (see 5.4 and 5.8)CTCSS_SEL is a serial bus select pin. It is used to select the FX805 chip(U500), whichis used to generate CTCSS tones. (see 5.5)CHAN_PLL_SEL is a serial bus select pin. It is used to select the PLL chip in theChannel PLL circuit (U604). (See 5.6)SIGGEN_ADSEL is a serial bus select pin. It is used to select the quad DAC in the RFarea. This DAC controls the reference oscillator bias voltages, and the BALANCEvoltage controlled amplifier. (See 5.6)CHAN_VCO_EN is a CPU output that enables (when high) the Channel VCO. (See 5.6and 5.7)EXT_REF_DIV is a CPU timer input. It is the output of the external reference clockdivided by 3200. The software can measure what the reference frequency is, and thenuse this input to calculate the frequency error of the channel PLL reference oscillator. Itcan then adjust the channel reference oscillator to reduce this error to less than 0.3ppm.(See 5.6)
Page 16 RF Technology T505 CIRCUIT DESCRIPTIONSPARE_SEL is a serial bus select. It has been reserved for future use, and has beenbrought out to the rear DB25 connector. (see 5.1)CH_EN is a serial bus select. It is brought out to the rear panel and is used to interfaceto the channel encoder on the rear daughter-board. (See 5.1)Any GPS pulses are isolated from the on-board electronics by the opto-isolator U212.The output of that opto-isolator is then connected to the GPS timer input of the CPU.The software assumes that any GPS pulses are 1 second apart and can use this input tomeasure the frequency error of the channel PLL reference oscillator. . It can then adjustthe channel reference oscillator to reduce this error to less than 0.3ppm. (See 5.1)TERM_EN2 and TERM_EN1 are used to enable (when low) 600 ohm termination ofLine2, and Line1 respectively. (See 5.3)Fo_MOD_2, and Fo_CHAN_2 are the Fo outputs from the Modulation PLL and theChannel PLL divided by two. They should be 200Hz square waves, except for briefperiods when frequencies are being changed. (See 5.6)LCD_DB7 is an input used to sense if the LCD display module is busy processing thelast command sent to it.ECLK is a pin that at start-up only, should have the CPU system clock of 7.3728MHzon it.TX_LED, ALARM_LED, are CPU outputs that drive (when low) the TX LED, and theALARM LED on.T/R_RELAY_H, when high, drives the T/R RELAY output low, and also enables theRF power amplifier. The T/R RELAY output can activate at least one conventional12V relay. (See 5.1)SCLK, and MOSI are used as the core of a serial bus. SCLK is a clock pin, and MOSIis a bi-directional data pin.PA_CS is a serial select pin. It is passed, via the rear DB25 connector to the ExternalPower Amplifier (PA). (See 5.1)DBGTX_TTL, DBGRX_TTL are RS232 transmit and receive (TTL) data pins whichare connected to the debug port after conversion to/from RS232 compatible voltagelevels by U202 and U201.TXD_TTL, RXD_TTL, RTS_TTL, CTS_TTL, DTR_TTL, DSR_TTL, are RS232 datapins which are connected to the main front panel serial port after conversion to/fromRS232 compatible voltage levels by U202 and U201.PTT_uPHONE is a CPU input and it reflects the state of the PTT pin on the microphonehandset.TONE_INT is a CPU input that comes from the FX805 (U500). This pin is used toindicate when a Tone has been decoded, or there is some other need to service theFX805. As yet this pin is not used in the T50. (See 5.5)
RF Technology T50 Page 175 CIRCUIT DESCRIPTIONLOOP_DET is a CPU pin that is asserted low if there is dc loop current detectedthrough the centre tap input of Line2. (See 5.3)FILTER_OFF is a CPU output that is used to by-pass, when low, the low pass filter inthe Tone Input Circuitry. (See 5.5)PTT-in is an input from the rear DB25 connector that causes the INT pin of the CPU tobe asserted (low) when 1mA of current is drawn via that pin. If PTT-in is pulled toground, through a resistance of at most 3.9kohms, it will cause INT to be asserted. If itis pulled low via a 2K2 resistor, and as many as three diodes in series, it will still causethe INT pin to be asserted. This latter example shows that quite complex diode logiccan be used on this pin.BKGD is a bi-directional I/O pin used to communicate with the core of the CPU. It isconnected to the debug port and is utilised by specialised hardware to control the CPUexternally, even without any firmware being present in the Flash.DEV_H_L is a CPU output that can be used to generate a test signal in the audio path.It is currently not used. (See 5.4)The RESET pin is both a low active input and a low active output to the CPU. Ifgenerated externally to the CPU, it forces the CPU into reset, and if the CPU executes aRESET instruction this pin will be driven low by the CPU.Whenever there is insufficient volts (< 4.65V) on pin 2 of the MC33064D (U203), itwill keep its RES output low. After the voltage has met the right level it will assert itsoutput low for another 200 milliseconds. Thus the CPU will be held in reset until VCCis at the correct level. Thus the PWR_OK LED will only light when VCC is withinspecification, and RESET has been released.S200 is a momentary push-button switch that, when pressed, will cause the CPU to bereset.MOD_PLL_SEL is a serial bus select pin. It is used to select the Modulation PLL chip(U602). (See 5.6)LCD_RS, LCD_R/W, and LCD_E are reserved for interfacing to an LCD displaymodule. Note that this feature has not been implemented.U205 is used to select whether the Flash or RAM is to be read or written.U207 is a single supply, 5V, TSOP40 Flash chip of size 8, 16, or 32 Megabits, and isused to store the firmware.U208 is a 1, or 4, Megabit Static RAM in an SOP-32 package, and is used for both codeand data. The code in the RAM is copied from the Flash, at start-up.
Page 18 RF Technology T505 CIRCUIT DESCRIPTION5.3 Audio Processing Section (Sheet 3)Sheet 3 is a schematic, which itself refers to two other sheets.Sheet 3 shows how the two Line inputs go to audio transformers T300 and T301, arethen optionally terminated by analogue switches U301B, and U301C, before beingpassed to the audio input stages described by Sheet 4.It also shows how the Direct Audio (TONE) signal is passed to the Tone circuitry (sheet5).It also shows how dc current in Line1 will cause the opto-isolator (U300) to generatethe CPU input LOOP_DET.Relay RL300 is used to drive current back through an externally generated dc loop,when the CPU output LOOP/VOLTS_SEL is high.The output of the Tone circuitry and the Audio circuitry is mixed (summed) andamplified by U302. It is then passed through a high order low pass filter (3.1kHz),before being attenuated by digital POT U303.The Digital POT (U303) sets the Maximum deviation.U302C then adds 6dB of gain before sending the audio to the modulator.R317, D307, and C304, act as an average peak detector. This enables the CPU todetermine the size of signals being handled by the audio section.Note that the Line inputs, and the TONE input, are protected by transils and fusesagainst accidental connection to damaging voltages. The fuses (F300, F301, and F302)are not user replaceable. They are surface mount devices and must be replaced byauthorised service personnel.5.4 Line Input Processing Section (Sheet 4)The two audio inputs are passed, after transformer coupling, to sheet 4.In Sheet 4, the two Line Inputs are input to a transconductance amplifier (U402A, andU402B). A transconductance amplifier is a current controlled, current amplifier, i.e. itamplifies input current, but its level of amplification is controlled by the level of currentthat is injected into pin1 or pin16. By converting a DAC output into a current, andconverting the input voltage into an input current, U402A and U402B are converted intoVoltage Controlled voltage Amplifiers(VCAs).Two of the DAC outputs are converted to currents by U400B, U400C, Q401, and Q400,and these currents are used to control the gain of the transconductance amplifiers.The input voltages are converted to current by the input load resistors R402, and R403.The output currents are converted to voltages by resistors R420 and R424.
RF Technology T50 Page 195 CIRCUIT DESCRIPTIONThe outputs of the transconductance amplifiers are buffered by the darlington buffersprovided with the amplifiers (U402C, and U402D).The output of each VCA is then amplified by U405B and U405C respectively.The level of amplification of each VCA is adjusted in software in accordance with anyadjustments made to the LINE POT. The software converts the linear range of theLINE POT into a logarithmic scale, such that if the LINE POT is wound down to zero,the amplification of each VCA is reduced by 12db relative to its centre position.Similarly if the POT is wound to its maximum position, both amplifiers increase theirgain by 12dB.The outputs of these amplification stages are then attenuated. Analogue switchesU404A and U404Bare used to select which attenuation circuit is used for Line 2, andU404D and U404C are used to select which attenuation circuit is used for Line 1.If the resistive divider formed by R425, R426, and R439 is selected then the Line 2audio signal frequency response is unaffected (it is Flat). If the reactive divider definedby C402, R431, and R439 is selected, then higher frequencies of the Line 2 audio signalare attenuated less than lower frequencies, i.e. Pre-emphasis is applied to the audiosignal.Line 1 has an identical circuit.The outputs of these pre-emphasis/flat frequency response attenuators are then bufferedby U405A, and U405D respectively.The microphone input is amplified by U400D, after being limited by D400. It is passedthrough a pre-emphasis network (defined by C404, R433, and R436), and is enabled, ordisabled by switch U403D.The outputs of the Line 1 conditioning circuit, the Line 2 conditioning circuit, and themicrophone input amplifier, are then mixed (summed) and amplified by U407A. Itsoutput is, in turn, amplified by U407B, but the gain of U407B is either 2.7 or 27depending on the state of analogue switch U403B.The CPU is capable of injecting a clipped (saturated) signal into the audio path. Thiscan be achieved via the two digital outputs DEV_H_L and TEST_DEV. This iscurrently not used.The output of U407B is passed (signal LINE_INP) to the Line Level Sense circuitry(sheet 3) so that the CPU can determine the input line level.U407B’s output is also passed to the limiter defined by D402, and D401. ResistorsR442, and R444 are used to “soften” the clipping, i.e. to “round off” the edges as thevoltage hits the clipping levels. This reduces the level of the lower order harmonicsproduced.U407C then buffers the output for mixing with the tone output circuitry.
Page 20 RF Technology T505 CIRCUIT DESCRIPTIONThe PWR_CNTRL_RAW DAC output is used to control the bias to the on-board RFamplifier (see Sheet 8). The CPU output pin PWR_CNTRL_HIGH is effectivelysummed with the DAC output to define three control ranges:State of PWR_CNTRL_HIGH PWRCNTRL Voltage RangeTriState 2.98 – 5.86Low (0V) 0.6 – 3.0High (5V) 3.55 - 5.96Table 9: Power Control Ranges.Note that in practice only the last two power ranges are used. The last is used when theExternal Power Amplifier is the 38-50MHz model, and the middle is used otherwise.U401 is an octal shift register and octal latch combined. When there is a rising edge onLINEINP_DEN, the 8 shift register outputs are latched into the octal latch. The outputsof the octal latch are the outputs Q0 to Q7. Thus the last 8 data bits clocked onto MOSI,by SCLK, before LINEINP_DEN is clocked high, will appear on Q0 to Q7. This,therefore, forms an inexpensive means for the CPU to increase its number of outputs.U406 is a quad 8 bit DAC. The CPU communicates with the DAC via SCLK, MOSI,and the select signal LINEINP_ADSEL, which is low when the DAC is selected.U302B is used to convert the DAC output into a bias level for the LCD. The bias level,would be adjusted for temperature, and as per a calibration procedure. Note that, at thisstage, the LCD display option is not developed.5.5 Tone Generation Section (Sheet 5)U500 is a CTCSS tone encoder and decoder. The integrated circuit is also capable ofgenerating and receiving DCS signals, but at this stage this has not been implemented.The CPU accesses U500 via the serial bus using MOSI, SCLK, and the low activeSelect signal CTCSS_SEL.The output of the tone generator is mixed (summed) with any signals that are allowedthrough analogue switch U301D.U502 is set up as a balanced differential amplifier. The resistors R530, R531, R508,R509, R510, R532, R533, and R511, are precision resistors to improve the CMRR ofthe differential amplifier.U502A amplifies, as well as mixes, the two audio inputs, and its output is either passedthrough a low pass filter (at 250Hz), or not, depending on the state of analogue switchU301A.The output of U502C is then attenuated by a digital POT, before being buffered byU502D.
RF Technology T50 Page 215 CIRCUIT DESCRIPTIONThe digital POT performs two functions. It is used to help set the maximum CTCSStone deviation. It does this in conjunction with U500, as it is also possible for theCTCSS tones that are launched by U500 to be adjusted using software.The second function of the digital POTs is enabled when U301D is enabled. The levelof attenuation by the digital POT is adjusted (by software) in line with adjustmentsmade by users to the LINE Potentiometer on the front panel.R526, D502, and D503, form a limiter, that prevents any signal arriving from the TONEpair from ever exceeding 3kHz deviation.5.6 Frequency Synthesiser (Sheet 6)This circuit also includes Sheet 7 as a block diagram. Sheet 7 contains the schematicfor the two Voltage Controlled Oscillators.There are two complete Phase Locked Loops. One is called the Modulation PLL, andthe other is referred to as the Channel PLL.The Modulation PLL does change frequencies slightly, but by less than +/- 240kHz.The Channel PLL is the principal PLL that changes frequencies when the exciterchanges frequency.As its name suggests, modulation is performed on the Modulation PLL.The modulation is a conventional 2 point FM modulation. Modulation by signals,whose frequency components are well below the PLL loop frequency, is effected bymodulating the reference oscillator of the Modulation PLL. Frequencies well above thePLL loop frequency are effected by modulating the Modulation VCO directly, andfrequencies in the cross-over region are a combination of the two.The heart of this schematic are the two PLL chips U602, and U604.Each is, in fact, a dual PLL chip, but only one PLL in each is used. All that is used ofthe second PLL chip is its dividers. The outputs of these dividers can be switched to theFoLD output pin, which is then converted to a square wave by a further division of 2 byU606A and U606B.By using the second PLL’s dividers it is possible to divide the reference oscillator, andthe VCO output down to frequencies that can be handled by the Timer inputs of theCPU, without causing excessive interrupt load to the CPU.5.6.1 The Modulation PLLU602 and the Modulation VCO (see Sheet 7) form the modulation PLL. U602 acts asits own crystal oscillator for its reference oscillator. X600 is a 5ppm, 12MHz, crystal.Its resonant point is adjusted by the bias applied to varactor D600.
Page 22 RF Technology T505 CIRCUIT DESCRIPTIONThe bias applied to varactor D600 is a combination of the potentials at two DACoutputs (MOD_ADJ and MOD_ADJ_FINE), plus the modulating signal arriving atMOD_IN (which is the same signal as MOD_OUT in Sheet 3).The summing of these three voltages is performed by U607.The Phase detector output of the PLL chip is then passed through the loop filter networkdefined by C612, R618, C625, R617, C613, and C718 (see Sheet 7). L713 is used tofilter out any residual noise (outside of the audio bandwidth), including the phasedetector frequency, and/or any switch-mode noise from the dc voltage rails.The loop filter signal is then fed as a control voltage to the Modulation VCO(MOD_PLL_IN).The output of the Modulation VCO is connected back to the PLL for phase detection viasignal path MOD_VCO_OUT.The phase detector output is also buffered and attenuated for the analogue input of theCPU. This is the function of U600, R622, and R625. In this way the CPU can monitorthe VCO bias to ensure that it is within specification (>0.5V, and < 4.5V).The FoLD pin, of U602, can be used for many purposes. It can be connected to theoutput of any of the 4 internal dividers, or be used as a LOCK-DETECT monitor, or asa user programmable output pin. In this circuit it is used as a LOCK-DETECT outputwhen the frequency is being changed, but otherwise it is connected internally to theunused reference divider of U602, to deliver a 400Hz pulse train to FoLD.U602 is set up with a phase detector frequency of 20kHz.5.6.2 The Channel PLLU604 and the Channel VCO (see Sheet 7) form the Channel PLL. U604 acts as its owncrystal oscillator for its reference oscillator. X601 is a 5ppm, 12MHz, crystal. Itsresonant point is adjusted by the bias applied to varactor D601.The bias applied to varactor D601 is adjusted by the CHAN_ADJ DAC output.The Phase detector output of U604 is then passed through the loop filter networkdefined by C622, R620, C626, R619, C623, and C725 (see Sheet 7). L718 is used tofilter out any residual noise (outside of the audio bandwidth), including the phasedetector frequency, and/or any switch-mode noise from the dc voltage rails.The loop filter signal is then fed as a control voltage to the Channel VCO(CHAN_PLL_IN).The output of the Channel VCO is connected back to the PLL for phase detection viasignal path CHAN_VCO_OUT.The phase detector output is also buffered and attenuated for the analogue input of theCPU. This is the function of U608, R623, and R624. In this way the CPU can monitorthe VCO bias to ensure that it is within specification (>0.5V, and < 4.5V).
RF Technology T50 Page 235 CIRCUIT DESCRIPTIONThe FoLD pin, of U604, can be used for many purposes. It can be connected to theoutput of any of the 4 internal dividers, or be used as a LOCK-DETECT monitor, or asa user programmable output pin. In this circuit it is used as a LOCK-DETECT outputwhen the frequency is being changed, but otherwise it is connected internally to theunused reference divider of U604, to deliver a 400Hz pulse train to FoLD.U604 is set up with a phase detector frequency of 31.25kHz.The signal CHAN_VCO_EN is an output from the CPU that is used to turn on (whenHigh) or turn off (when low) the Channel VCO.5.6.3 The External Reference DividerThe external Reference Input (EXT_REF_IN) is buffered by an attenuator networkformed by R628,R633, and R630 in parallel with R635. This also forms a 50 ohmtermination network for the reference input.R628 is a 1 watt resistor, and so, in theory levels as high as +30dBm can be accepted.To be safe, though, the largest signal that is approved to be accepted is +26dBm.Q600 is set up as a switching transistor, and with a sufficiently high input signal level (>+5dBm), it will clock U605.U605 is set up as a divide by 128 circuit, and its output is then divided by U606 by 25.The two unused, divide by two, stages of U606 are then used to convert the 400HzFoLD pulse trains into 200Hz square waves for the Timer inputs of the CPU.5.6.4 The DACU601 is a quad DAC. It is programmed by the CPU via the serial bus (SCLK andMOSI). It is selected by the low active signal SIGGEN_ADSEL.Three of its outputs are used to adjust the reference oscillators.In the presence of a GPS 1Hz pulse input, or an external reference oscillator, thesoftware will automatically track the channel VCO to these external inputs. (GPS haspriority over an external reference).The modulation reference oscillator is always tracked as closely as possible to theChannel reference oscillator. Because of this need for very close tracking, two DACoutputs are summed. In this way, the CPU is given coarse, as well as fine control.The CPU can sense a phase difference of 136ns in 4 seconds, i.e. as little as 0.034ppmbetween the two PLL reference oscillators. Each step of the MOD_ADJ_FINE DACoutput will move the frequency about one eighth of this amount.The other DAC output (BALANCE) is used to adjust the BALANCE VCA (see sheet7).
Page 24 RF Technology T505 CIRCUIT DESCRIPTIONThe user programmable digital output of the DAC (MOD_VCO_EN) is used to enablethe modulation VCO (when High)5.6.5 The VCOs and the RF OutputThese are more closely described in 5.7, but it is worth noting that there are threeprimary outputs of the VCOs. There is each VCO output itself, but also the signalVCO_OUT. This is the difference frequency between them.Generally the modulation VCO is set to oscillate at 320MHz. To get an output of40MHz, the Channel VCO is set to 280MHz.But if you wanted an output frequency of, for example, 40.00125MHz, then themodulation VCO would change to 319.78125 MHz (i.e. it drops by 218.75kHz), and theChannel VCO would become 279.78MHz (i.e. dropping by 220kHz).By such small changes in the modulation VCO (maximum delta is +/- 240kHz), eachmultiple of 1250Hz can be accommodated, but without any need to ever change the twophase detector frequencies.5.7 Voltage Controlled Oscillators (Sheet 7)JFETS Q704, and Q705 are the heart of two Colpitts oscillators.The capacitor feedback divider for Q704 (modulation VCO) is defined by C732 andC733, and this shapes the negative impedance looking into the drain of Q704.In the Channel VCO, C740 is effectively in series with Cgs of Q705. These, then definethe negative impedance looking into the drain of Q705.L716, in parallel with L726 forms the tank coil for the modulation oscillator, and theresonant capacitance is defined by the series combination of C750 and the capacitanceacross D701. L712 has +ve reactance and it acts to reduce the minimum effectivecapacitance seen back through C750, thereby increasing the tuning range slightly.Similarly, L719 is the tank coil for the channel oscillator, and the resonant capacitanceis defined by the series combination of C751 and the capacitance across D704. L717has +ve reactance and it acts to reduce the minimum effective capacitance seen backthrough C751, thereby increasing the tuning range slightly.The VCO frequencies are controlled by the bias applied to D701 and D704 respectively,which is set by signals MOD_PLL_IN and CHAN_PLL_IN. These signals are thephase detector outputs from the Modulation PLL and the Channel VCO respectively(see Sheet 6).Diodes D700 and D703 are used to provide some AGC for the JFETs. These Schottkydiodes will increase the –ve bias on the gate of the JFETs (thereby decreasing the drain
RF Technology T50 Page 255 CIRCUIT DESCRIPTIONcurrent) if the oscillation level should increase, and similarly the gate bias will reduce ifthe –ve peaks of the oscillation should reduce.The Modulation bias is also adjusted by the modulation input (2PORT_MOD). Thissignal is amplified by a VCA. The BALANCE DAC output is converted to a current byU707 and Q700, and that then is used to set the gain of the VCA. The output of theVCA is then attenuated by R725/R729, and this bias is then applied to varactor D701.Note that the modulation bias is in anti-phase to the PLL bias.Each VCO has its own gyrator feed circuit (Q707 and Q702). This is done to removeany possible noise on the voltage rails from effectively modulating either VCO.The drain current of each VCO can be switched off or on by MOSFETs Q701 andQ703. Q701 is switched on when MOD_VCO_EN is high. MOD_VCO_EN is the userprogrammable digital output from DAC U601 (see Sheet 6). Q703 is switched on whenthe CPU output CHAN_VCO_EN (see Sheet 2) is high.The output of each VCO is “sniffed”, by a high impedance attenuator. In themodulation VCO, R737 in series with the 50 ohm input impedance of U702 forms thisattenuator. In the Channel VCO, R745, R736, and the input impedance of U706 formone such attenuator, and R741 in series with the input impedance of U703 forms theother.U702 amplifies the modulation VCO signal, which is then amplified again by U701,then filtered to reduce harmonics, before arriving at the LO input of MX700 at a level ofaround +5 - +7dBm.The output of U702 is also attenuated by R733, and then re-amplified before becomingMOD_VCO_OUT. MOD_VCO_OUT is then passed to the Modulation PLL (U602,see Sheet 6). U703’s primary role is to ensure that noise that becomes coupled by thePLL chip, back onto its VCO input, does not couple back into the path to the mixer. Ifthis isn’t done, then the mixer’s LO input contains many harmonics of the referenceoscillator.U703 performs both an amplification role, and an isolation role similar to U703’s. Itsoutput (CHAN_VCO__OUT) is fed back to the Channel PLL (U604, see Sheet 6).U706 and U701 are both designed to be in “gain compression”, i.e. their outputs aresaturating, so that significant changes in their input levels will not significantly changetheir output levels. U706, though, starts its gain compression at about 10dB lower thanU701. In this way, variations in output level caused by variations in the parameters ofthe JFETS Q704, and Q705, will not significantly modify the levels of signals arrivingat the mixer MX700.The output of U706 is attenuated by the network R714, R742, and R724, and then it isfiltered to reduce the VCO harmonics as much as possible. This filtered VCO output isthen brought to the RF pin of the mixer at a level of about –20 to –22dBm.The output of the mixer is then run through a low pass filter to remove frequencies otherthan (Fmod - Fvco). U700 then amplifies this signal to a level of about –6 to –8dBm.
Page 26 RF Technology T505 CIRCUIT DESCRIPTIONThe external output signal of T/R_RELAY, which is asserted low whenever the exciteris keyed up, is used to switch MOSFET Q706 off. When Q706 is off, amplifier U700 isenabled. When T/R_RELAY is high, then U700 is deprived of bias current andVCO_OUT is then completely disabled.5.8 1W Broadband HF Power Amplifier (Sheet 8)The HF output of Sheet 7 (VCO_OUT) becomes the primary input to this circuit(RF_IN).This RF input is first amplified to a level of about +2 to +4dBm by U800, then it isamplified by Q801 to about +20dBm (with full bias), and then it is amplified by Q804and Q805 to +30dBm. The output stage gain is less above about 42MHz, so that thepeak output power falls to about +26dBm at 50MHz.The effective gain of Q801 is controlled by adjusting the bias level (PWRCNTRL).This can vary from 0.6V to nearly 6V, and is adjusted by a DAC output and a CPUdigital output, in Sheet 4.The software monitors the forward power sense in the External Power Amplifier(PA) aswell as the Reverse Power, temperatures, drain currents etc. It does this via the serialbus (formed by SCLK and MOSI) and the select pin for the ADC converter on theExternal PA (PA_CS).The software then automatically adjusts the PWRCNTRL bias to:1) Keep the forward power at the level defined by parameter PA_SET_FWD_PWR(see 4.1), unless,2) If the reverse power is higher thanPA_SET_FWD_PWR*REV_PWR_ALARM/100.0 then the forward power isreduced until the reverse power stops exceeding this limit, or,3) The temperature of the PA output stage FETs exceeds 120C, in which case forward power is reduced until this stops occurring.5.9 Power Generation Section (Sheet 9)There are three switch mode dc-dc converters in the board. These use monolithicconverters based on the National LM2595. Two of the converters are 12V convertersand one is a 5V converter.The power in to the whole exciter is the voltage rail 28V.U907 converts this down to 12V.
RF Technology T50 Page 276 FIELD ALIGNMENT PROCEDURE 6.1 Standard Test ConditionU908 is set up as an inverter, and uses the 12V rail to create –12V.U909 converts the +12V rail to +5V for all the digital circuitry.The +12V rail is used to power the two on-board relays, as well as up to one extra off-board relay. It is also dropped, via a linear regulator (U910) to produce the +10V rail,which in turn is dropped by another linear regulator U911 to produce +5Q, which, inturn, is dropped by a further linear regulator (U912) to produce +2.5V.Similarly U913, U914, and U915 are linear regulators that produce –10V, -5V, and –2.5V from the –12V output of U908.+10, +5Q, and +2.5V, -10V, -5V, and –2.5V rails are used in the audio and RF sections.D911 is a 4.096V (3%) reference diode. Its output is buffered by U906 which thenproduces a reference voltage rail Vref, which is used by the CPU’s A/D converter, andthe DACs, and also in the voltage to current converters of the VCAs (see Sheet 4, andSheet 7).6 FIELD ALIGNMENT PROCEDURE6.1 Standard Test EquipmentSome, or all of the following equipment will be required:• AF signal generator, 75 - 3000Hz frequency range, with output level set to 387mVRMS and, if the microphone input is to be tested, 10mV rms output.• Power supply set to 28Vdc, with current >10A.• RF 50Ω load(s), 250W rated, return loss <-20dB, and total attenuation of 50dB• Reference Oscillator. At least +5dBm output.The external reference frequency is limited to:500kHz, or any multiple,any multiple of 128KHz greater than or equal to 4,any multiple of 160KHz greater than or equal to 3 The accuracy should be at least 0.5ppm, preferably 0.1ppm• RF Peak Deviation Meter• True RMS AC voltmeter, and a DC voltmeter.• RF Power Meter (accurate to 2%, i.e. 0.17dB)• Some means of measuring Reverse Power, and a known 3:1 mismatched load.
Page 28 RF Technology T50 6 FIELD ALIGNMENT PROCEDURE6.2 Invoking the Calibration ProcedureThe T50 has in-built firmware to perform calibration. This firmware requests the userfor information as to meter readings, and/or to attach or adjust the AF signal generator.The firmware based calibration program can be accessed from a terminal, a terminalemulator, or the Eclipse50 terminal emulator.As for Section 4.1, the firmware, after power up, issues the following prompt:T50>Via a terminal, or a terminal emulator, a user can type various commands in. The basiccommand to start the calibration procedure is:T50> cal calibration_typeWhere “calibration_type” is one of:a) misc: Miscellaneous parameters are defined and calibratedb) dev: Maximum deviations are set (automatically forces a “cal line” and a “caltone”)c) line: Line1, Line 2, Dir Aud (Tone), and microphone inputs are tested andcalibrated.d) pwr: The External PA attached to this unit is calibrated.e) ref: The reference oscillators are adjusted and calibratedf) tone: The maximum tone deviations are calibratedg) all : (which does all the above)6.3 The “Miscellaneous” Calibration ProcedureT50> cal miscThis procedure should not normally be invoked as part of any field maintenance.The program will print out the Model Name and Serial Number of the exciter. If theseparameters haven’t already been defined (e.g. at an initial calibration, at the factory, theservice personnel will be prompted to enter these values).Then it will ask the operator to enter the value of Vref (as measured at TP913, see 5.9).Measure the voltage, at TP913 (Vref)and type it on the command line...Unless the reference diode D911 has been replaced, this should not be done. The usershould simply hit the Enter key to bypass this operation. If, though, D911 has beenreplaced for some reason, then, the lid of the unit should be removed, and the voltagemeasured. TP913 can be found just above JP12 (near the centre of the exciter).
RF Technology T50 Page 296 FIELD ALIGNMENT PROCEDUREThen the exciter low battery alarm level will be asked for. If the current value isacceptable, the User need only hit the Enter key on the keyboard. If another value ispreferred, then that value can be typed in.For example:The Exciter's Low Battery Alarm is 24VIf this is correct enter <RET>,else enter the new value: 26In this example, the low Battery Alarm level is changed to 26V.The next request for the User should always be ignored.The Exciter's default Modulation VCO Frequency is 320MHzIf this is correct enter <RET>else enter the new value:This parameter is for future use only. Please always hit the Enter key.Then the user will be prompted for serial port baud rates, parities etc. Please leave theseparameters unchanged unless you are familiar with how to change such parameters onyour PC. The Eclipse50 software will expect 57600 BPS, and No Parity, and No FlowControl. Note well, that if you do change any of these, the change will not take effectuntil you power down the exciter and then power it up again. (As an alternative topower cycling the exciter, and if the cover is off the exciter, you may simply pressswitch momentary push-button S200 (see 5.2).The next thing the calibration program tests is the state of the LINE pot. The programwill ask the user to adjust this pot. If the Potentiometer is below centre, it will ask theuser to adjust it up (i.e. adjust it clockwise). If it is above centre, it will ask the user toadjust it down (i.e. adjust it counter clockwise). When the POT has been centred, or,the User hits the Enter key, the program will terminate.This last step is normally only done as part of a factory install, and it is done to ensurethat the POT is centred before being shipped to customers. For field maintenancepurposes, the step should be skipped in order to leave the LINE POT at the settingformerly desired.6.4 The “Reference” Calibration ProcedureT50> cal refTo compensate for crystal ageing and other parameters that drift, the followingprocedure should be performed approximately once per year.If your exciter is fitted with the external reference option (an extra BNC connector onthe rear panel), the user can connect an external reference directly to the rear BNCconnector. If the exciter does not have this option, then the top cover of the exciter
Page 30 RF Technology T50 6 FIELD ALIGNMENT PROCEDUREshould be removed and an external reference oscillator should be connected via a 50ohm probe to J4 (just to the right of the DC voltage regulators and converters).The external reference clock, should have a power level from +5 to +26dBm and anyfrequency that meets the following criteria:500kHz, or any multiple,any multiple of 128KHz, greater than or equal to 4,any multiple of 160KHz, greater than or equal to 3,No User input is required, except to hit the Enter key when the external reference isconnected. The firmware will automatically adjust both reference oscillators, and savethe new DAC adjustments in FLASH (as parameters) to be used to centre the oscillatorseach time the unit powers up.The user should see the following output. (Note that the temperatures, frequencies,error values, serial number, etc, indicated are examples only)Connect an external reference input or the clock outputfrom a GPS receiver to the GPS input.Enter <RET> when this has been done.External Reference is 10.0MHzEnsure that the displayed reference frequency (10.0MHz in the above example) is thesame as the frequency of your oscillator.Waiting for a GPS clock.. . . . . .The system waits here for a GPS reference to be seen. At this stage, this method ofcalibrating the clocks has not been validated by RFT Engineering, so do not attempt touse this option as yet.Then the firmware continues.Have not observed a GPS clockSystem Frequency relative to external clock is 7372654.32The crystal temperature is 22C.Waiting up to 1 minute for clocks to stabilise.. . . . . .The crystal temperature is 22 CThe channel ref error = 1 cnts or, 1.63 HzThe mod ref error = 1 cnts or, 1.63Hz
RF Technology T50 Page 316 FIELD ALIGNMENT PROCEDUREThe user may see the following error message.The Model Name is T50and the Serial Number is 002313Please take note of the Model, DAC values, serial number andcrystal temperature, and report this problem to RFT Engineering.If this message is seen, it indicates a potential fault condition. If the final text indicatesthat the channel and mod reference errors are within specification (the last text output),then the unit is able to be used, but nonetheless, it is advisable that an e-mail be sent toRF Technology indicating the problem. Such a problem may be caused by a crystalhaving aged to such an extent, that it is getting close to the region where it may soon, nolonger be adjusted, or that, with further degradation, the low frequency performancemay be compromised.As no other calibration procedure requires the top cover to be removed, you shouldreplace the cover, should you have had to remove it for this procedure.6.5 The “Deviation” Calibration ProcedureT50> cal devThis procedure should not normally be invoked as part of any field maintenance. Theonly conceivable time that it might ever be used, would be if a non standard maximumdeviation was required.The first stage begins with the following message:This procedure sets the Balance and Max Deviation LevelsConnect an audio signal generator to the Line 1 inputsSet the output to be a sine wave, 388mV rms and 75HzDisconnect the RF connection to the PAand connect a deviation meter to the exciter's BNC output.Note that the nominal output power of the exciter’s output is 1W. Whilst the powerlevel is not set to the maximum level, the deviation meter should either have an inputpower rating of at least +30dBm, or suitable attenuation is required between the exciterand the deviation meter. Note that for this test the nominal RF output frequency is37.5MHz.Enter + or - to increase or decrease the deviation,and <RET> when the deviation is 5kHz?Here the user can hit the +, p, or P, keys to increase the deviation, or -, m, or M keys todecrease it. In response, the firmware, which has opened up the maximum deviationdigital POT (U303) to maximum gain is adjusting the Line1 VCA accordingly.When the deviation is as close to 5kHz as can be obtained, the User should hit theirEnter key.
Page 32 RF Technology T506 FIELD ALIGNMENT PROCEDUREThen the firmware will make the following request.Change the signal generator frequency to 1kHzWhen this has been done, the User needs to hit the Enter key, and the following willappear again.Enter + or - to increase or decrease the deviation,and <RET> when the deviation is 5kHz?In response to the +, or – keys (or m, p, M, or P), the firmware adjusts the BALANCEVCA accordingly. The user should do this until the deviation is as close to thatachieved at 75Hz as possible.That now sets the balance.The firmware will now prompt the user for a “User specified Deviation”. This is adeviation other than the following standard deviations, 5.0kHz, 4.0kHz, 3.0kHz,2.5kHz, 2.0kHz, and 1.5kHz. At the factory, it is set to 4.5kHz.Enter the User Specified Deviation (kHz): 4.5In this example, the user has specified 4.5kHz deviation.Then the software will automatically set the Hi-Gain option on, which will cause theoutput to got to somewhere between 7 and 9kHz deviation, and it will be very clipped.Then the user will be prompted, as it was for the Balance adjustment, to enter keys toset the deviation to as close to 5kHz as possible, whilst still being lower than 5kHz.That sets the deviation setting for U303 for 5kHz maximum deviation. This is thenfollowed by the same procedure to set the 4kHz maximum deviation setting, then 3kHz,2.5khz, 1.5kHz, and then the User Specified Deviation (e.g. 4.5kHz).The least significant BCD digit of the deviation parameter, in a channel setting, selectsthe appropriate maximum deviation when the exciter keys up. (See 4.2 and Table 7). Inthis way, for example, it may be possible to allocate frequencies in the band 30-40MHzon 12.5kHz channel spacing, and on 20kHz channel spacing over the band 25-30MHz.6.6 The “Tone Deviation” Calibration ProcedureT50> cal toneThis procedure should not normally be invoked as part of any field maintenance. Theonly conceivable time that it might ever be used, would be if a non standard maximumtone deviation was required.
RF Technology T50 Page 336 FIELD ALIGNMENT PROCEDUREThis procedure is similar to the maximum deviation procedure (See 6.5). The Line 1and Line 2 audio paths are turned off for this procedure, as is the Direct Audio (TONE)input. The only signal sent to the modulator is a tone of 107.2Hz.The program starts off, with the following message:This procedure sets the maximum tone deviations for aMax Deviation of 5kHz. Note that the actual maximumtone deviations automatically scale with the Max Deviation.eg a 500Hz tone deviation would be a 250Hz tone deviationwhen a 2.5kHz Max Deviation was chosen.Disconnect the RF connection to the PA,and connect a deviation meter to the exciter's BNC output.The audio is being switched off, and 107.2Hz tone generatedEnter the User Specified Tone Deviation(Hz):The user is expected to connect up the deviation meter, and enter the User SpecifiedMaximum Tone Deviation. This is a deviation that is different to the standarddeviations of 750Hz, 500Hz, 375Hz, 250Hz, and 150Hz. The factory default for this is600Hz.Thence a procedure that is almost identical to that used for setting maximum deviationsis used to set these tone deviations. There is one significant difference, though, and thatis, as well as using + (or p, or P), and – (or m, or M) keys to step the deviation up ordown, one can also use the < key, or the > key. These last two keys will step down, orup, the level of signal transmitted by U500, whereas the other keys will modify thesetting of the digital POT U503 (see 5.5).6.7 The “Line” Calibration ProcedureT50> cal lineThis procedure should not be used as part of any usual field maintenance, unless anycomponent has been replaced that might affect the gain of any of the audio inputs.Note that if the deviations are calibrated, then this procedure will be automaticallyinvoked.The program begins:Calibrating Line 1 and Line 2 audio levelsAttach an audio signal generator to Line 1Set the output to be a sine wave, 388mV rms and 1kHzDisconnect the RF connection to the PAand connect a deviation meter to the exciter's BNC output.Enter + or - to increase or decrease the deviation,and <RET> when the deviation is 3kHz
Page 34 RF Technology T506 FIELD ALIGNMENT PROCEDURE?This is the same mechanism that is used in 6.5 and 6.6. The user enters +, p, or P toincrease the Line 1 gain, to increase the deviation, or, -, m, or M to decrease the gain.The user hits the Enter key when the desired deviation is set.Now attach the audio signal generator to Line 2Enter + or - to increase or decrease the deviation,and <RET> when the deviation is 3kHz?Again the user enters +, p, or P to increase the Line 2 gain, to increase the deviation, or,-, m, or M to decrease the gain. The user hits the Enter key when the desired deviationis set.The firmware goes on to open the microphone audio path (note that the microphonePTT switch does not need to be depressed for this). Note also that the application of a10mV test input is a factory only test. An adequate test in field testing, would be tospeak into the microphone and see that the deviation meter responded accordingly.Testing the microphone input.Attach an audio signal generator to the microphone input.Set the output to be a sine wave, 10mV rms and 1kHz.Ensure that the deviation is between 2.7 and 3.3kHzEnter <RET> when measurement complete.Alert Engineering if there is a failure.Then the Direct Audio input (with the low pass filter off) is tested.Testing the Tone input.Attach an audio signal generator to the Tone input.Set the output to be a sine wave, 388mV rms, and 1kHz.Enter + or - to increase or decrease the deviation,and <RET> when the deviation is 3kHz?And then user then follows the same procedure as defined for setting the Line 1 andLine 2 gains. Note that the digital POT does not provide the same linearity as the VCAsused in the line input audio circuits. As such it may not be possible to set the deviationto exactly 3kHz.6.8 The “Power” Calibration ProcedureT50> cal pwrAll Power Amplifiers are calibrated ex-factory. All the important parameters, such asthe forward and reverse power sense adjustment, and drain bias settings are notdependent on the exciter, and thus any factory calibrated PA50 power amplifier can beconnected to, and work correctly with any T50 exciter. The frequency range of theamplifier is defined by three jumper settings on the external PA, which the CPU can
RF Technology T50 Page 356 FIELD ALIGNMENT PROCEDUREdetect. Thus the CPU knows (on power up) what frequencies are, or are not, possible tobe used with the PA.The exciter does store some PA specific parameters, such as the Serial Number of thePA, and also some offset values for the pre-amp drain current, and the output stagedrain current. These latter offsets improve the accuracy of the over current alarmtesting, (but are not strictly necessary). In order to set these parameters, it is advisedthat this procedure be performed every time an exciter is used with a new ExternalPower Amplifier. Note that many of the stages can be skipped if they have beenperformed before.The program begins:This procedure is used to calibrate an External Power Amplifier.The existing PA's SERIAL NO is: 002356Enter the new PA serial no:Simply hit the Enter key here if the Serial Number is correct.Take the lid off a PA, and set all threebias Pots (R238,R239, and R240) fully clockwise.Enter <RET> when done.Now we will set the Bias currents in the PA.Attach power to the PA.Attach a calibrated millivoltmeter between TP100(+ve lead)and TP101(-ve lead). Adjust R238 until the meter reads 50mVEnter <RET> when doneAttach the calibrated millivoltmeter between TP102(+ve lead)and TP103(-ve lead). Adjust R239 until the meter reads 10mVEnter <RET> when done.Adjust R240 until the meter reads 20mVEnter <RET> when done.Unless one of the RF power transistors has been replaced, the user should simply skipthese last four stages by hitting the Enter key four times.Attach the Power Amplifier to the Exciter,and ensure the PA is powered up.Attach the PA output to a reflectometer, the reflectometer to a 50dB(nominal) attenuator, and the attenuator to a calibrated power meterEnter <RET> when this has been done");Adjust C209 in the Power Amplifieruntil there is a minimum in the dc voltage measured at TP204Enter <RET> when done.
Page 36 RF Technology T507.1 Overall Description 7 SPECTFICATIONSAdjust the Forward Power Sense POT (R228) untilthe measured output power (adjusted for the attenuator andreflectometer losses) is equal to the Preset Forward Power.Enter <RET> when done.Unless something has been modified in the power sense circuits, these last three stagesshould be skipped by simply hitting the Enter key three times.This next step is necessary, and it allows the firmware to compute an offset in the outputstage drain current, so that the exciter’s ability to measure the output stage drain currentis significantly more accurate.Measure the voltage across TP102(+ve lead)and TP103(-ve lead), and enter the value measuredThis next step is also necessary, and it allows the firmware to compute an offset in thepre-amp stage drain current, so that the exciter’s ability to measure the pre-amp stagedrain current is significantly more accurate.Measure the voltage across TP100(+ve lead)and TP101(-ve lead), and enter the value measuredThe next two stages can be skipped by simply hitting the Enter key twice.Attach the reflectometer to an open circuitEnter <RET> when this has been doneAdjust the Reverse Power Sense POT (R227) untilthe displayed reverse power equals 50W.Enter <RET> when this has been done.This then completes all the calibration procedures.7 SPECIFICATIONS7.1 Overall DescriptionThe transmitter is a frequency synthesized, narrow band, HF, FM unit, used to drive anexternal 120 watt amplifier. All necessary control and 600 Ω line interface circuitry isincluded.7.1.1 Channel CapacityAlthough most applications are single channel, it can be programmed for up to 100channels, numbered 0-99. This is to provide the capability of programming all channelsinto all of the transmitters used at a given site. Where this facility is used in conjunction
RF Technology T50 Page 377 SPECIFICATIONS 7.1.2 CTCSSwith channel-setting in the rack, exciter modules may be “hot-jockeyed” or usedinterchangeably. This can be convenient in maintenance situations.Channel information consists of two independent and complete sets of information,which may differ or be the same. One set defines the parameters to be used, if the unitis keyed up from PTT-in being “grounded”, and the other set defines the parameters tobe used if the unit is keyed up for any reason other than PTT-in being “grounded”.The parameters that can be defined on a per channel basis are:a) The frequencyb) The CTCSS tone (if any) to be generatedc) The delay from the initiation of the exciter to RF output being generated(Is specified in hundredths of a second, 0 – 999)d) The transmit tail; the length of time after the exciter is released beforetransmission stops. (Is specified in seconds 0 – 999).e) The No Tone period; a length of time after the expiry of (d) in whichtransmission continues, but with no tone being generated. (Is specified intenths of a second, 0 –999)f) Whether audio from Line 1, or Line 2, or both, (or neither!) is enabled,and whether or not Pre-emphasis is required, or not, on each line, andwhether or not an extra gain pad (of 20dB) is required.g) What Nominal Tone Deviation, and Maximum Deviation should be used(See Tables 7 and 8)7.1.2 CTCSSFull EIA subtone Capability is built into the modules. The CTCSS tone can beprogrammed for each channel. This means that each channel number can represent aunique RF and tone frequency combination.7.1.3 Channel ProgrammingThe channel information is stored in non-volatile memory and can be programmed viathe front panel connector using a PC, and/or RF Technology software.7.1.4 Channel SelectionChannel selection is by eight channel select lines connected to the rear panel thatmounts on the rear DB25 female connector.A BCD active high code applied to the lines selects the required channel. This can besupplied by pre-wiring the rack connector so that each rack position is dedicated to afixed channel. Alternatively, thumb-wheel switch panels are available.
Page 38 RF Technology T507.1.5 Microprocessor 7 SPECIFICATIONS7.1.5. MicroprocessorA microprocessor is used to control the synthesizer, tone squelch, PTT functions,external reference monitoring, calibration, fault monitoring and reporting, output powerlevel control, volume adjustment, line selection, option setting, and facilitate channelfrequency programming.7.2 Physical ConfigurationThe transmitter is designed to fit in a 19 inch rack mounted sub-frame. The installedheight is 4 RU (178 mm) and the depth is 350 mm. The transmitter is 63.5 mm or twoEclipse modules wide.7.3 Front Panel Controls, Indicators, and Test Points7.3.1 ControlsTransmitter Key - Momentary Contact Push ButtonLine Input Level - screwdriver adjust multi-turn pot7.3.2 IndicatorsPower ON - Green LEDTx Indicator - Yellow LEDFault Indicator - Flashing Red LED7.3.3 Test PointsThere are no front panel test points. All important test points are monitored by thefirmware.7.4 Electrical Specifications7.4.1 Power RequirementsOperating Voltage - 16 to 32 VdcCurrent Drain - 1A Maximum, typically 0.25A StandbyPolarity - Negative Ground
RF Technology T50 Page 397 SPECIFICATIONS 7.4.2 Frequency Range and Channel Spacing7.4.2 Frequency Range and Channel SpacingThe T50, as a single model, covers the full band, and all channel spacing.Frequency 25 kHz 20kHz 15kHz 12.5 kHz 10 kHz 7.5 kHz 6.25 kHz25 - 50 MHz T50 T50 T50 T50 T50 T50 T507.4.3 Frequency Synthesizer Step SizeThe specified frequency can be any multiple of 1250Hz.7.4.4 Frequency Stability±5 ppm over 0 to +60 C, standard±2 ppm over -20 to +60 C, optional7.4.5 Number of Channels100, numbered 00 - 997.4.6 RF Output Impedance50Ω7.4.7 Output powerThe T50 needs an external PA50 power amplifier.The output power is factory set to 100W by default, the reverse power level is set tofold back the output power when the PA50 sees a load with VSWR of 3:1 or higher (i.e.when the reverse power is 25% or more of the forward power).7.4.8 Transmit Duty Cycle100%7.4.9 Spurious and HarmonicsLess than 0.25µW, when connected to a PA50 operating at an output power level of100W.
Page 40 RF Technology T507.4.10 Carrier and Modulation Attack Time 7 SPECIFICATIONS7.4.10 Carrier and Modulation Attack TimeLess than 25ms. Certain models have RF envelope attack and decay times controlled inthe range 200µs< tr/f <2ms according to regulatory requirements.7.4.11 ModulationType - Two point direct FM with optional pre-emphasisFrequency Response - ±1 dB of the selected characteristic from 300-3000HzMaximum Deviation - Maximum deviation set on a per channel basis to 1.5, 2.0, 2.5,3.0, 4,0, or 5.0 kHz. A User Specified Maximum deviation can be preset as well.(Please request this when ordering the unit).7.4.12 DistortionModulation distortion is less than 3% at 1 kHz and 60% of rated system deviation.7.4.13 Residual Modulation and NoiseThe residual modulation and noise in the range 300 - 3000 Hz is typically less than -50dB with 5kHz maximum deviation (i.e. a test level of 3kHz).7.4.14 600ΩΩΩΩ Line Input SensitivityAdjustable from -32 to +12 dBm for rated deviation on two symmetric, independent,transformer coupled Line inputs.7.4.15 Test Microphone Input200Ω dynamic, with PTT7.4.16 External Tone InputCompatible with R500 tone output7.4.17 T/R Relay DriverAn open drain MOSFET output is provided to operate an antenna change over relay orsolid state switch. The transistor can sink up to 250mA. A 1W flywheel diode connectsto the 12V rail to prevent damage to the FET from inductive kick from a relay coil.
RF Technology T50 Page 417 SPECIFICATIONS 7.4.20 Channel Select Input/Output7.4.18 Channel Select Input/OutputCoding - 8 lines, BCD coded 00 - 99Logic Input Levels - Low for <1.5V, High for >3.5VInternal 10K pull down resistors select channel 00 when all inputs are O/C.7.4.19 DC Remote KeyingAn opto-coupler input is provided to enable dc loop keying over balanced lines or localconnections. The circuit can be connected to operate through the 600Ω line.7.4.20 PTT inAn external input that when “grounded” with at least 1mA of current, will cause theexciter to key up. The current is drawn from the PTT in input which attempts to “pullup” anything that “grounds” it. It can be “grounded” with a short to 0V, or anyresistance up to 3.9k ohm. If the resistance of the “ground connection” is less than 2.2kohms, then up to three diodes in series can be part of the grounding path. This allowssystems installers to use quite complex diode logic to enable or disable exciters.It would normally be “grounded” by the COS output of a receiver.7.4.21 Programmable No-Tone PeriodA No-Tone period can be appended to the end of each transmission to aid in eliminatingsquelch tail noise which may be heard in mobiles with slow turn off decoders. The No-Tone period can be set from 0-99.9 seconds in 0.1 second increments.7.4.22 Firmware TimersThe controller firmware includes some programmable timer functions.Repeater Hang Time(Transmit Tail) - A short delay or ``Hang Time'' can beprogrammed to be added to the end of transmissions. This is usually used in talkthrough repeater applications to prevent the repeater from dropping out between mobiletransmissions. The Hang Time can be individually set on each channel for 0 - 999seconds.Time Out Timer - A time-out or transmission time limit can be programmed toautomatically turn the transmitter off. The time limit can be set from 0-10millionseconds. The timer is automatically reset when the PTT input is released. Zero secondsdisables the timer, and allows continuous transmission.
Page 42 RF Technology T507.4.25 CTCSS 7 SPECIFICATIONS7.4.23 CTCSSCTCSS tones can be provided by an internal encoder or by an external source connectedto the external tone input. The internal CTCSS encoding is provided by a subassemblyPCB module. This provides programmable encoding of any tone, accurate to 0.1Hz,including all EIA tones, from 67.0Hz to 257Hz.7.5 Connectors7.5.1 RF Output ConnectorBNC connector on the module rear panel.7.5.2 Power & I/O Connector25-pin “D” Female Mounted at the top of the rear panel7.5.3 External Reference Connector (optional)BNC connector mounted in the middle of the rear panel connector.
RF Technology T50 Page 43A ENGINEERING DIAGRAMSA Engineering DiagramsThere is only one printed circuit board covering all models of the T50. There is onlyone option for this product, which is the external reference clock option. That optionadds a rear connector, and a small length of coaxial cable and a fixed coaxial cablemount to the parts list.Unlike other products in the Eclipse range, CTCSS is no longer an option. All unitshave the ability to transmit CTCSS tones.A.1 Block DiagramFigure 1 shows the block signal flow diagram.A.2 Circuit DiagramsFigure 2 shows the detailed circuit diagram with component numbers and values for themain (exciter) PCB. Figure 3 shows the detailed circuit diagram with componentnumbers and values for the higher-power PA variation. Figure 4 shows the detailedcircuit diagram with component numbers and values for the lower-power PA variation.A.3 Component Overlay DiagramsFigure 5 shows the PCB overlay guide with component positions for the main (exciter)PCB. Figure 6 shows the detailed circuit diagram with component numbers and valuesfor the higher-power PA variation. Figure 7 shows the detailed circuit diagram withcomponent numbers and values for the lower power PA variation.
T50 PARTS LISTPage 44 RF Technology T50B T50 Parts ListMain PCB Assembly Parts Ref Description Part NumberC100 Four EMI filters in a 1206 package, 100pF 34/NFA3/1100C101 Four EMI filters in a 1206 package, 100pF 34/NFA3/1100C102 Four EMI filters in a 1206 package, 100pF 34/NFA3/1100C103 Four EMI filters in a 1206 package, 100pF 34/NFA3/1100C201 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC202 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC203 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC204 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC205 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC206 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC207 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC208 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC209 10nF Cer. Cap, X7R, 0603, 10% 46/63X1/010NC210 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC211 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC212 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC214 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC215 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC216 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC217 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC219 3u3F SMD, Electrolytic cap, A body, 10% 42/STA1/03U3C220 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC221 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC222 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC224 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC225 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC226 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC227 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC300 22uF Electrolytic Capacitor, 35V, Bipolar 41/BP01/022UC301 22uF Electrolytic Capacitor, 35V, Bipolar 41/BP01/022UC302 2n2F Cer. Cap, NPO, 1206, 5% 46/26N1/02N2C304 3u3F SMD, Electrolytic cap, A body, 10% 42/STA1/03U3C305 10nF Cer. Cap, NPO, 1206, 5% 46/26N1/010NC306 120pF Cer. Cap, NPO, 0603, 5% 46/63N1/120PC307 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC308 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC309 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC310 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC311 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC312 Ceramic Capacitor, 16V, 1uF, Y5V 45/Y5X7/1U16C400 33uF SMD, low ESR Electrolytic cap, C body 41/SELC/033UC401 10nF Cer. Cap, X7R, 0603, 10% 46/63X1/010NC402 3n3F Cer. Cap, NPO, 1206, 5% 46/26N1/03N3C403 3n3F Cer. Cap, NPO, 1206, 5% 46/26N1/03N3C404 3n3F Cer. Cap, NPO, 1206, 5% 46/26N1/03N3C405 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100N
T50 PARTS LISTRF Technology T50 Page 45RefC406Description100nF, 25V, Y5V, decoupler, 0603Part Number46/63Y1/100NC407 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC408 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC409 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC410 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC411 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC412 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC413 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC414 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC415 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC416 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC417 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC418 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC419 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC422 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC423 Ceramic Capacitor, 16V, 1uF, Y5V 45/Y5X7/1U16C425 Ceramic Capacitor, 16V, 1uF, Y5V 45/Y5X7/1U16C426 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC427 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC428 Ceramic Capacitor, 16V, 1uF, Y5V 45/Y5X7/1U16C500 22pF Cer. Cap, NPO, 0603, 5% 46/63N1/022PC501 22pF Cer. Cap, NPO, 0603, 5% 46/63N1/022PC502 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC503 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC506 100pF Cer. Cap, NPO, 0603, 5% 46/63N1/100PC507 100pF Cer. Cap, NPO, 0603, 5% 46/63N1/100PC508 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC509 Ceramic Capacitor, 16V, 1uF, Y5V 45/Y5X7/1U16C510 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC511 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC513 Ceramic Capacitor, 16V, 1uF, Y5V 45/Y5X7/1U16C514 Ceramic Capacitor, 16V, 22nF, X7R, 22nF,10% 45/X7R1/022NC515 100nF, 50V, NPO, TH, 5mm 47/2007/100NC516 1n2F Cer. Cap, NPO, 1206, 5% 46/26N1/01N2C600 10nF Cer. Cap, X7R, 0603, 10% 46/63X1/010NC601 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC602 10nF Cer. Cap, X7R, 0603, 10% 46/63X1/010NC603 10nF Cer. Cap, X7R, 0603, 10% 46/63X1/010NC604 Ceramic Capacitor, 16V, 1uF, Y5V 45/Y5X7/1U16C605 10nF Cer. Cap, X7R, 0603, 10% 46/63X1/010NC606 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC607 Ceramic Capacitor, 16V, 1uF, Y5V 45/Y5X7/1U16C608 Ceramic Capacitor, 16V, 1uF, Y5V 45/Y5X7/1U16C609 10nF Cer. Cap, X7R, 0603, 10% 46/63X1/010NC610 470pF Cer. Cap, NPO, 0603, 5% 46/63N1/470PC611 10nF Cer. Cap, X7R, 0603, 10% 46/63X1/010NC612 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC613 Ceramic Capacitor, 16V, 220nF, X7R, 10% 45/X7R1/220NC614 15pF Cer. Cap, NPO, 0603, 5% 46/63N1/015PC615 15pF Cer. Cap, NPO, 0603, 5% 46/63N1/015PC616 10nF Cer. Cap, X7R, 0603, 10% 46/63X1/010N
T50 PARTS LISTPage 46 RF Technology T50Ref Description Part NumberC617 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC619 Ceramic Capacitor, 16V, 1uF, Y5V 45/Y5X7/1U16C620 33pF Cer. Cap, NPO, 0603, 5% 46/63N1/033PC621 Ceramic Capacitor, 16V, 1uF, Y5V 45/Y5X7/1U16C622 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC623 Ceramic Capacitor, 16V, 220nF, X7R, 10% 45/X7R1/220NC624 Ceramic Capacitor, 16V, 1uF, Y5V 45/Y5X7/1U16C625 3u3F SMD, Electrolytic cap, A body, 10% 42/STA1/03U3C626 3u3F SMD, Electrolytic cap, A body, 10% 42/STA1/03U3C627 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC628 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC629 Ceramic Capacitor, 16V, 1uF, Y5V 45/Y5X7/1U16C630 Ceramic Capacitor, 16V, 1uF, Y5V 45/Y5X7/1U16C631 10nF Cer. Cap, X7R, 0603, 10% 46/63X1/010NC634 10nF Cer. Cap, X7R, 0603, 10% 46/63X1/010NC635 8p2F Cer. Cap, NPO, 0603, 5% 46/63N1/08P2C636 10nF Cer. Cap, X7R, 0603, 10% 46/63X1/010NC637 56pF Cer. Cap, NPO, 0603, 5% 46/63N1/056PC638 10nF Cer. Cap, X7R, 0603, 10% 46/63X1/010NC639 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC640 8p2F Cer. Cap, NPO, 0603, 5% 46/63N1/08P2C641 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC642 100pF Cer. Cap, NPO, 0603, 5% 46/63N1/100PC643 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC644 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC645 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC646 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC648 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC649 10pF Cer. Cap, NPO, 0603, 5% 46/63N1/010PC650 10pF Cer. Cap, NPO, 0603, 5% 46/63N1/010PC651 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC652 10nF Cer. Cap, X7R, 0603, 10% 46/63X1/010NC700 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC701 10nF Cer. Cap, X7R, 0603, 10% 46/63X1/010NC702 10nF Cer. Cap, X7R, 0603, 10% 46/63X1/010NC703 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC704 22pF Cer. Cap, NPO, 0603, 5% 46/63N1/022PC705 22pF Cer. Cap, NPO, 0603, 5% 46/63N1/022PC706 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC707 22pF Cer. Cap, NPO, 0603, 5% 46/63N1/022PC708 22pF Cer. Cap, NPO, 0603, 5% 46/63N1/022PC709 22pF Cer. Cap, NPO, 0603, 5% 46/63N1/022PC710 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC711 10nF Cer. Cap, X7R, 0603, 10% 46/63X1/010NC712 3u3F SMD, Electrolytic cap, A body, 10% 42/STA1/03U3C713 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC714 150pF Cer. Cap, NPO, 0603, 5% 46/63N1/150PC715 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC716 22pF Cer. Cap, NPO, 0603, 5% 46/63N1/022PC717 3p9F Cer. Cap, NPO, 0603, 5% 46/63N1/03P9C718 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100N
T50 PARTS LISTRF Technology T50 Page 47Ref Description Part NumberC719 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC720 10nF Cer. Cap, X7R, 0603, 10% 46/63X1/010NC721 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC722 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC723 3u3F SMD, Electrolytic cap, A body, 10% 42/STA1/03U3C724 10nF Cer. Cap, X7R, 0603, 10% 46/63X1/010NC725 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC726 3p9F Cer. Cap, NPO, 0603, 5% 46/63N1/03P9C727 15pF Cer. Cap, NPO, 0603, 5% 46/63N1/015PC728 15pF Cer. Cap, NPO, 0603, 5% 46/63N1/015PC729 15pF Cer. Cap, NPO, 0603, 5% 46/63N1/015PC730 10nF Cer. Cap, X7R, 0603, 10% 46/63X1/010NC731 15pF Cer. Cap, NPO, 0603, 5% 46/63N1/015PC732 5p6F Cer. Cap, NPO, 0603, 5% 46/63N1/05P6C733 12pF Cer. Cap, NPO, 0603, 5% 46/63N1/012PC734 3p9F Cer. Cap, NPO, 0603, 5% 46/63N1/03P9C735 3p9F Cer. Cap, NPO, 0603, 5% 46/63N1/03P9C736 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC737 10nF Cer. Cap, X7R, 0603, 10% 46/63X1/010NC738 10nF Cer. Cap, X7R, 0603, 10% 46/63X1/010NC739 10nF Cer. Cap, X7R, 0603, 10% 46/63X1/010NC740 47pF Cer. Cap, NPO, 0603, 5% 46/63N1/04P7C742 10nF Cer. Cap, X7R, 0603, 10% 46/63X1/010NC743 10nF Cer. Cap, X7R, 0603, 10% 46/63X1/010NC745 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC746 10nF Cer. Cap, X7R, 0603, 10% 46/63X1/010NC747 10nF Cer. Cap, X7R, 0603, 10% 46/63X1/010NC748 10nF Cer. Cap, X7R, 0603, 10% 46/63X1/010NC749 10nF Cer. Cap, X7R, 0603, 10% 46/63X1/010NC750 22pF Cer. Cap, NPO, 0603, 5% 46/63N1/022PC751 33pF Cer. Cap, NPO, 0603, 5% 46/63N1/033PC752 Ceramic Capacitor, 16V, 1uF, Y5V 45/Y5X7/1U16C753 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC754 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC755 47pF Cer. Cap, NPO, 0603, 5% 46/63N1/047PC756 10pF Cer. Cap, NPO, 0603, 5% 46/63N1/010PC757 120pF Cer. Cap, NPO, 0603, 5% 46/63N1/120PC758 120pF Cer. Cap, NPO, 0603, 5% 46/63N1/120PC759 47pF Cer. Cap, NPO, 0603, 5% 46/63N1/047PC760 Ceramic Capacitor, 16V, 1uF, Y5V 45/Y5X7/1U16C761 22pF Cer. Cap, NPO, 0603, 5% 46/63N1/022PC762 10nF Cer. Cap, X7R, 0603, 10% 46/63X1/010NC763 10nF Cer. Cap, X7R, 0603, 10% 46/63X1/010NC764 6p8F Cer. Cap, NPO, 0603, 5% 46/63N1/06P8C765 56pF Cer. Cap, NPO, 0603, 5% 46/63N1/056PC770 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC771 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC772 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC773 Ceramic Capacitor, 16V, 1uF, Y5V 45/Y5X7/1U16C774 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC775 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100N
T50 PARTS LISTPage 48 RF Technology T50Ref Description Part NumberC776 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC801 100nF Cer. Cap, X7R, 1206, 10% 46/3310/100NC802 1n2F Cer. Cap, X7R, 0603, 10% 46/63X1/01N2C803 47pF Cer. Cap, NPO, 0603, 5% 46/63N1/047PC804 470pF Cer. Cap, NPO, 0603, 5% 46/63N1/470PC805 10nF Cer. Cap, X7R, 0603, 10% 46/63X1/010NC806 1n2F Cer. Cap, X7R, 0603, 10% 46/63X1/01N2C807 1p8F Cer. Cap, NPO, 0603, 5% 46/63N1/01P8C808 100nF Cer. Cap, X7R, 1206, 10% 46/3310/100NC810 100uF Electrolytic Capacitor, 35V 41/2001/100UC811 1p8F Cer. Cap, NPO, 0603, 5% 46/63N1/01P8C812 100pF Cer. Cap, NPO, 0603, 5% 46/63N1/100PC813 56pF Cer. Cap, NPO, 0603, 5% 46/63N1/056PC815 33pF Cer. Cap, NPO, 0603, 5% 46/63N1/033PC816 10pF Cer. Cap, NPO, 0603, 5% 46/63N1/010PC818 68pF Cer. Cap, NPO, 0603, 5% 46/63N1/068PC819 68pF Cer. Cap, NPO, 0603, 5% 46/63N1/068PC820 470pF Cer. Cap, NPO, 0603, 5% 46/63N1/470PC821 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC822 10nF Cer. Cap, X7R, 0603, 10% 46/63X1/010NC823 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC824 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC825 220pF Cer. Cap, NPO, 0603, 5% 46/63N1/220PC826 3u3F SMD, Electrolytic cap, A body, 10% 42/STA1/03U3C827 10 uF Electrolytic capacitor 41/2001/010UC829 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC901 100uF SMD, low ESR Electrolytic cap, D body 41/SELD/100UC902 470uF Electrolytic Capacitor, Low ESR, 35V 41/200L/470UC903 33uF SMD, low ESR Electrolytic cap, C body 41/SELC/033UC904 3u3F SMD, Electrolytic cap, A body, 10% 42/STA1/03U3C915 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC920 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC923 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC924 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC925 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC926 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC927 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC928 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC929 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC930 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC931 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC932 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC933 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC934 100nF, 25V, Y5V, decoupler, 0603 46/63Y1/100NC935 470uF Electrolytic Capacitor, Low ESR, 35V 41/200L/470UC936 33uF SMD, low ESR Electrolytic cap, C body 41/SELC/033UC937 100uF SMD, low ESR Electrolytic cap, D body 41/SELD/100UC938 100uF SMD, low ESR Electrolytic cap, D body 41/SELD/100UC939 100uF SMD, low ESR Electrolytic cap, D body 41/SELD/100UC940 33uF SMD, low ESR Electrolytic cap, C body 41/SELC/033UC941 33uF SMD, low ESR Electrolytic cap, C body 41/SELC/033U
T50 PARTS LISTRF Technology T50 Page 49Ref Description Part NumberC942 33uF SMD, low ESR Electrolytic cap, C body 41/SELC/033UC943 33uF SMD, low ESR Electrolytic cap, C body 41/SELC/033UC944 33uF SMD, low ESR Electrolytic cap, C body 41/SELC/033UC945 33uF SMD, low ESR Electrolytic cap, C body 41/SELC/033UD102 Radially mounted LED 21/1010/LEDRD103 Radially mounted LED 21/1010/LEDYD104 Radially mounted LED 21/1010/LEDGD200 Dual Series Diode 21/3010/AV99D202 Gen. Purpose 1N4004 diode in SMD pkg 24/SMA1/4004D203 Zener Diode 21/1040/C3V3D300 Bi-directional Transil 24/TRSL/012VD301 Bidirectional Transil 24/TRSL/012VD302 Bidirectional Transil 24/TRSL/012VD303 Dual Series Diode 21/3010/AV99D304 Dual Series Diode 21/3010/AV99D305 Dual Series Diode 21/3010/AV99D306 Gen. Purpose 1N4004 diode in SMD pkg 24/SMA1/4004D307 Dual Schottky, Comm. Cathode, Diode 24/3BAT/54C1D400 Dual Series Diode 21/3010/AV99D401 Dual Series Diode 21/3010/AV99D402 Dual Series Diode 21/3010/AV99D403 Dual Series Diode 21/3010/AV99D500 Dual Series Diode 21/3010/AV99D501 Dual Series Diode 21/3010/AV99D502 Dual Series Diode 21/3010/AV99D503 Dual Series Diode 21/3010/AV99D600 Voltage Controlled Capacitor 21/3060/V109D601 Voltage Controlled Capacitor 21/3060/V109D700 Schottky diode 21/3030/0017D701 Voltage Controlled Capacitor 21/3060/V109D703 Schottky diode 21/3030/0017D704 Voltage Controlled Capacitor 21/3060/V109D800 Dual Schottky, Comm. Cathode, Diode 24/3BAT/54C1D906 Power Fast Schottky diode 24/BRM1/40T3D907 Power Fast Schottky diode 24/BRM1/40T3D908 Power Fast Schottky diode 24/BRM1/40T3D909 Power Fast Schottky diode 24/BRM1/40T3D910 Gen. Purpose 1N4004 diode in SMD pkg 24/SMA1/4004D911 4.096V Reference Diode 29/VREF/0001F300 SMD (1206 pkg), 125mA fuse 39/1206/A125F301 SMD (1206 pkg), 125mA fuse 39/1206/A125F302 SMD (1206 pkg), 125mA fuse 39/1206/A125J1 BNC Connector 35/5BNC/RA01JP12 4 Pin SIL Header 35/2501/0004JP2 14 Pin SIL Header 35/2501/0014JP3 10 pin DIL Header 35/7026/0010L100 Ferrite, 1206 pkg, 120 ohm, 3A 37/P034/0001L101 Ferrite, 1206 pkg, 600 ohm, 200mA 37/P033/0001L102 Ferrite, 1206 pkg, 600 ohm, 200mA 37/P033/0001L104 Ferrite, 1206 pkg, 600 ohm, 200mA 37/P033/0001L200 220uH Choke 37/3320/P103
T50 PARTS LISTPage 50 RF Technology T50Ref Description Part NumberL202 Ferrite, 1206 pkg, 600 ohm, 200mA 37/P033/0001L203 Ferrite, 1206 pkg, 600 ohm, 200mA 37/P033/0001L204 Ferrite, 1206 pkg, 600 ohm, 200mA 37/P033/0001L205 Ferrite, 1206 pkg, 600 ohm, 200mA 37/P033/0001L500 Ferrite, 1206 pkg, 600 ohm, 200mA 37/P033/0001L600 Ferrite, 1206 pkg, 600 ohm, 200mA 37/P033/0001L700 27nH Inductor 37/8551/027NL701 39nH Inductor 37/8551/039NL702 27nH Inductor 37/8551/027NL703 27nH Inductor 37/8551/027NL704 47nH Inductor 37/8551/047NL705 27nH Inductor 37/8551/027NL706 330nH Inductor 37/3320/330NL708 330nH Inductor 37/3320/330NL709 330nH Inductor 37/3320/330NL710 330nH Inductor 37/3320/330NL711 330nH Inductor 37/3320/330NL712 220nH Inductor 37/8551/220NL713 220uH Choke 37/3320/P103L714 330nH Inductor 37/3320/330NL715 330nH Inductor 37/3320/330NL716 Inductor - Air Core, 12.5nH 37/AC51/12N5L717 100nH Inductor 37/8551/100NL718 220uH Choke 37/3320/P103L719 Inductor - Air Core, 18.5nH 37/AC51/18N5L720 220nH Inductor 37/8551/220NL721 270nH Inductor 37/85T1/270NL722 220nH Inductor 37/8551/220NL723 330nH Inductor 37/3320/330NL724 330nH Inductor 37/3320/330NL725 3u3H Choke 37/3320/P101L726 82nH Inductor 37/8551/082NL800 Ferrite, 1206 pkg, 600 ohm, 200mA 37/P033/0001L801 Ferrite, 1206 pkg, 600 ohm, 200mA 37/P033/0001L803 Inductor - Air Core, 538nH 37/AC52/558NL804 Inductor - Air Core, 538nH 37/AC52/558NL805 Inductor - Air Core, 120nH 37/AC52/120NL806 Inductor - Air Core, 169nH 37/AC52/169NL807 220uH Choke 37/3320/P103L808 3u3H Choke 37/3320/P101L809 180nH Inductor 37/8551/180NL810 1uH Choke 37/3320/P200L811 3u3H Choke 37/3320/P101L901 33uH Choke 37/3320/P102L902 SMD High Current, Shielded, 220uH Choke 37/MSP1/220UL903 SMD High Current, Shielded, 330uH Choke 37/MSP1/330UL904 SMD High Current, Shielded, 220uH Choke 37/MSP1/220UL905 220uH Choke 37/3320/P103L906 Ferrite, 1206 pkg, 120 ohm, 3A 37/P034/0001L907 Ferrite, 1206 pkg, 120 ohm, 3A 37/P034/0001L908 Ferrite, 1206 pkg, 120 ohm, 3A 37/P034/0001
T50 PARTS LISTRF Technology T50 Page 51Ref Description Part NumberL909 Ferrite, 1206 pkg, 120 ohm, 3A 37/P034/0001M1 Tinned BeCu, used as RF screen. 94/BECU/24XHM1C RF Screen Cover (Small) 80/9209/0001M2 Conductive Foam Inserts 83/0001/0000MX700 +7dBm0 Mixer, Surface Mount 37/MIXR/P028P1 DB9 Female with filtered pins 35/5012/009FP3 DB25 Female with filtered pins 35/5012/025FQ200 Gen. Purpose NPN transistor in SOT-23 27/3020/3904Q201 N channel, Enhancement Mode MOSFET 27/30B5/5138Q202 N Channel Junction FET(low Freq) 27/3020/5484Q203 NPN Switching transistor in SOT-23 27/3020/2369Q204 NPN Switching transistor in SOT-23 27/3020/2369Q205 Gen. Purpose PNP transistor in SOT-23 27/3010/3906Q206 Gen. Purpose NPN transistor in SOT-23 27/3020/3904Q300 N channel, Enhancement Mode MOSFET 27/30B5/5138Q301 Gen. Purpose PNP transistor in SOT-23 27/3010/3906Q302 Gen. Purpose PNP transistor in SOT-23 27/3010/3906Q400 Gen. Purpose PNP transistor in SOT-23 27/3010/3906Q401 Gen. Purpose PNP transistor in SOT-23 27/3010/3906Q402 Gen. Purpose PNP transistor in SOT-23 27/3010/3906Q500 Gen. Purpose PNP transistor in SOT-23 27/3010/3906Q501 Gen. Purpose PNP transistor in SOT-23 27/3010/3906Q600 Gen. Purpose NPN transistor in SOT-23 27/3020/3904Q700 Gen. Purpose PNP transistor in SOT-23 27/3010/3906Q701 N channel, Enhancement Mode MOSFET 27/30B5/5138Q702 Gen. Purpose NPN transistor in SOT-23 27/3020/3904Q703 N channel, Enhancement Mode MOSFET 27/30B5/5138Q704 N Channel Junction FET(UHF) 27/3030/J309Q705 N Channel Junction FET(UHF) 27/3030/J309Q706 N channel, Enhancement Mode MOSFET 27/30B5/5138Q707 Gen. Purpose NPN transistor in SOT-23 27/3020/3904Q801 SOD-89A RF Transistor(1W) 27/300B/FQ17Q804 SOD-89A RF Transistor(1W) 27/300B/FQ17Q805 SOD-89A RF Transistor(1W) 27/300B/FQ17R100 0805, 1%, 4K7 resistor 51/8511/04K7R101 0805, 1%, 4K7 resistor 51/8511/04K7R102 0805, 1%, 4K7 resistor 51/8511/04K7R103 1206 180R resistor 51/3380/0180R104 1206 270R resistor 51/3380/0270R105 0805, 1%, 4K7 resistor 51/8511/04K7R201 0805, 1%, 1K resistor 51/8511/010KR202 0805, 1%, 1K resistor 51/8511/010KR203 0805, 1%, 1K resistor 51/8511/010KR204 0805, 1%, 1K resistor 51/8511/010KR205 0805, 1%, 2K2 resistor 51/8511/02K2R206 0805, 1%, 2K2 resistor 51/8511/02K2R207 0805, 1%, 68K resistor 51/8511/068KR208 0805, 1%, 22K resistor 51/8511/022KR209 0805, 1%, 330R resistor 51/8511/330RR210 0805, 1%, 1K resistor 51/8511/010KR211 0805, 1%, 220R resistor 51/8511/220R
T50 PARTS LISTPage 52 RF Technology T50Ref Description Part NumberR212 0805, 1%, 220R resistor 51/8511/220RR213 0805, 1%, 1M resistor 51/8511/01M0R214 1206 180R resistor 51/3380/0180R215 0805, 1%, 120R resistor 51/8511/120RR216 0805, 1%, 1K resistor 51/8511/01K0R217 0805, 1%, 1K resistor 51/8511/010KR218 0805, 1%, 1K resistor 51/8511/010KR219 0805, 1%, 1K resistor 51/8511/010KR220 0805, 1%, 1K resistor 51/8511/010KR221 0805, 1%, 560R resistor 51/8511/560RR222 0805, 1%, 1K resistor 51/8511/01K0R223 0805, 1%, 1K resistor 51/8511/010KR224 0805, 1%, 1K resistor 51/8511/010KR225 0805, 1%, 1K resistor 51/8511/010KR226 1206 180R resistor 51/3380/0180R227 0805, 1%, 56R resistor 51/8511/056RR228 0805, 1%, 1K resistor 51/8511/010KR229 0805, 1%, 1K resistor 51/8511/010KR230 0805, 1%, 120R resistor 51/8511/120RR231 0805, 1%, 120R resistor 51/8511/120RR232 0805, 1%, 560R resistor 51/8511/560RR233 0805, 1%, 22K resistor 51/8511/022KR234 0805, 1%, 1K resistor 51/8511/01K0R235 0805, 1%, 4K7 resistor 51/8511/04K7R236 0805, 1%, 22K resistor 51/8511/022KR237 0805, 1%, 47K resistor 51/8511/047KR238 0805, 1%, 1K resistor 51/8511/01K0R239 0805, 1%, 1K resistor 51/8511/01K0R240 0805, 1%, 1K resistor 51/8511/010KR241 0805, 1%, 47R resistor 51/8511/047RR242 0805, 1%, 47K resistor 51/8511/047KR243 0805, 1%, 220R resistor 51/8511/220RR244 0805, 1%, 10R resistor 51/8511/010RR245 0805, 1%, 1K resistor 51/8511/010KR300 0805, 1%, 27R resistor 51/8511/027RR301 0805, 1%, 27R resistor 51/8511/027RR302 0805, 1%, 27R resistor 51/8511/027RR303 0805, 1%, 27R resistor 51/8511/027RR304 0805, 1%, 330R resistor 51/8511/330RR305 0805, 1%, 330R resistor 51/8511/330RR306 0805, 1%, 10R resistor 51/8511/010RR307 0805, 1%, 4K7 resistor 51/8511/04K7R308 0805, 1%, 2K2 resistor 51/8511/02K2R309 0805, 1%, 560R resistor 51/8511/560RR310 0805, 1%, 560R resistor 51/8511/560RR311 0805, 1%, 22K resistor 51/8511/022KR312 0805, 1%, 22K resistor 51/8511/022KR313 0805, 1%, 22K resistor 51/8511/022KR314 0805, 1%, 1K resistor 51/8511/010KR315 0805, 1%, 22K resistor 51/8511/022KR316 0805, 1%, 1K resistor 51/8511/010K
T50 PARTS LISTRF Technology T50 Page 53Ref Description Part NumberR317 0805, 1%, 1K resistor 51/8511/01K0R318 0805, 1%, 120K resistor 51/8511/120KR319 0805, 1%, 120K resistor 51/8511/120KR320 0805, 1%, 120K resistor 51/8511/120KR321 0805, 1%, 68K resistor 51/8511/068KR322 0805, 1%, 68K resistor 51/8511/068KR323 0805, 1%, 68K resistor 51/8511/068KR324 0805, 1%, 1K resistor 51/8511/01K0R325 0805, 1%, 47K resistor 51/8511/047KR326 0805, 1%, 47K resistor 51/8511/047KR327 0805, 1%, 47K resistor 51/8511/047KR328 0805, 1%, 1K resistor 51/8511/010KR329 0805, 1%, 1K resistor 51/8511/010KR330 0805, 1%, 47K resistor 51/8511/047KR331 0805, 1%, 47K resistor 51/8511/047KR332 0805, 1%, 68K resistor 51/8511/068KR333 0805, 1%, 1K resistor 51/8511/01K0R335 0805, 1%, 22K resistor 51/8511/022KR336 0805, 1%, 22K resistor 51/8511/022KR400 0805, 1%, 330R resistor 51/8511/330RR401 0805, 1%, 270R resistor 51/8511/270RR402 0805, 1%, 22K resistor 51/8511/022KR403 0805, 1%, 22K resistor 51/8511/022KR404 0805, 1%, 56K resistor 51/8511/056KR405 0805, 1%, 5K6 resistor 51/8511/05K6R406 0805, 1%, 1K resistor 51/8511/010KR407 0805, 1%, 1K resistor 51/8511/010KR408 0805, 1%, 5K6 resistor 51/8511/05K6R409 0805, 1%, 120K resistor 51/8511/120KR410 0805, 1%, 47K resistor 51/8511/047KR411 0805, 1%, 47K resistor 51/8511/047KR412 0805, 1%, 1K resistor 51/8511/010KR413 0805, 1%, 1K resistor 51/8511/01K0R414 0805, 1%, 560R resistor 51/8511/560RR415 0805, 1%, 560R resistor 51/8511/560RR416 0805, 1%, 560R resistor 51/8511/560RR417 0805, 1%, 560R resistor 51/8511/560RR418 0805, 1%, 5K6 resistor 51/8511/05K6R419 0805, 1%, 22K resistor 51/8511/022KR420 0805, 1%, 120K resistor 51/8511/120KR421 0805, 1%, 22K resistor 51/8511/022KR422 0805, 1%, 120K resistor 51/8511/120KR423 0805, 1%, 1K resistor 51/8511/010KR424 0805, 1%, 1K resistor 51/8511/010KR425 0805, 1%, 22K resistor 51/8511/022KR426 0805, 1%, 22K resistor 51/8511/022KR427 0805, 1%, 47K resistor 51/8511/047KR428 0805, 1%, 22K resistor 51/8511/022KR429 0805, 1%, 22K resistor 51/8511/022KR430 0805, 1%, 47K resistor 51/8511/047KR431 0805, 1%, 270K resistor 51/8511/270K
T50 PARTS LISTPage 54 RF Technology T50Ref Description Part NumberR432 0805, 1%, 270K resistor 51/8511/270KR433 0805, 1%, 270K resistor 51/8511/270KR434 0805, 1%, 4K7 resistor 51/8511/04K7R435 0805, 1%, 1K resistor 51/8511/01K0R436 0805, 1%, 4K7 resistor 51/8511/04K7R437 0805, 1%, 47K resistor 51/8511/047KR438 0805, 1%, 47K resistor 51/8511/047KR439 0805, 1%, 4K7 resistor 51/8511/04K7R440 0805, 1%, 4K7 resistor 51/8511/04K7R442 0805, 1%, 4K7 resistor 51/8511/04K7R443 0805, 1%, 4K7 resistor 51/8511/04K7R444 0805, 1%, 4K7 resistor 51/8511/04K7R445 0805, 1%, 47K resistor 51/8511/047KR446 0805, 1%, 1K resistor 51/8511/010KR447 0805, 1%, 47K resistor 51/8511/047KR448 0805, 1%, 1K resistor 51/8511/010KR449 0805, 1%, 5K6 resistor 51/8511/05K6R450 0805, 1%, 120K resistor 51/8511/120KR451 0805, 1%, 47K resistor 51/8511/047KR452 0805, 1%, 1K resistor 51/8511/010KR453 0805, 1%, 1K resistor 51/8511/010KR454 0805, 1%, 1K resistor 51/8511/010KR455 0805, 1%, 1K resistor 51/8511/010KR456 0805, 1%, 47K resistor 51/8511/047KR457 0805, 1%, 1K resistor 51/8511/010KR458 0805, 1%, 4K7 resistor 51/8511/04K7R459 0805, 1%, 4K7 resistor 51/8511/04K7R460 0805, 1%, 4K7 resistor 51/8511/04K7R461 0805, 1%, 120K resistor 51/8511/120KR462 0805, 1%, 1K resistor 51/8511/010KR463 0805, 1%, 120K resistor 51/8511/120KR464 0805, 1%, 270K resistor 51/8511/270KR465 0805, 1%, 100K resistor 51/8511/100KR466 0805, 1%, 2K2 resistor 51/8511/02K2R467 0805, 1%, 4K7 resistor 51/8511/04K7R500 0805, 1%, 47K resistor 51/8511/047KR501 0805, 1%, 47K resistor 51/8511/047KR502 0805, 1%, 47K resistor 51/8511/047KR503 0805, 1%, 22K resistor 51/8511/022KR504 0805, 1%, 560R resistor 51/8511/560RR505 0805, 1%, 1K resistor 51/8511/010KR506 0805, 1%, 1K resistor 51/8511/010KR507 0805, 1%, 1M resistor 51/8511/01M0R508 0805, 0.5%, 50ppm, 7K5 resistor 51/85P1/07K5R509 0805, 0.5%, 50ppm, 7K5 resistor 51/85P1/07K5R510 0805, 0.5%, 50ppm, 7K5 resistor 51/85P1/07K5R511 0805, 0.5%, 50ppm, 7K5 resistor 51/85P1/07K5R512 0805, 1%, 1K resistor 51/8511/010KR513 0805, 1%, 1K resistor 51/8511/010KR514 0805, 1%, 1K resistor 51/8511/010KR516 0805, 1%, 680R resistor 51/8511/680R
T50 PARTS LISTRF Technology T50 Page 55Ref Description Part NumberR517 0805, 1%, 47K resistor 51/8511/047KR518 0805, 1%, 47K resistor 51/8511/047KR519 0805, 1%, 47K resistor 51/8511/047KR520 0805, 1%, 47K resistor 51/8511/047KR521 0805, 1%, 47K resistor 51/8511/047KR522 0805, 1%, 68K resistor 51/8511/068KR523 0805, 1%, 1K resistor 51/8511/01K0R525 0805, 1%, 1K resistor 51/8511/010KR526 0805, 1%, 2K2 resistor 51/8511/02K2R527 0805, 1%, 47K resistor 51/8511/047KR528 0805, 1%, 47K resistor 51/8511/047KR529 0805, 1%, 47K resistor 51/8511/047KR530 0805, 0.5%, 50ppm, 7K5 resistor 51/85P1/07K5R531 0805, 0.5%, 50ppm, 7K5 resistor 51/85P1/07K5R532 0805, 0.5%, 50ppm, 7K5 resistor 51/85P1/07K5R533 0805, 0.5%, 50ppm, 7K5 resistor 51/85P1/07K5R600 0805, 1%, 4K7 resistor 51/8511/04K7R602 0805, 1%, 27K resistor 51/8511/027KR603 0805, 1%, 27K resistor 51/8511/027KR604 0805, 1%, 100K resistor 51/8511/100KR605 0805, 1%, 27K resistor 51/8511/027KR606 0805, 1%, 5K6 resistor 51/8511/05K6R607 0805, 1%, 5K6 resistor 51/8511/05K6R608 0805, 1%, 2K2 resistor 51/8511/02K2R609 0805, 1%, 1K resistor 51/8511/010KR610 0805, 1%, 47K resistor 51/8511/047KR611 0805, 1%, 2K2 resistor 51/8511/02K2R612 0805, 1%, 100K resistor 51/8511/100KR613 0805, 1%, 47R resistor 51/8511/047RR614 0805, 1%, 47R resistor 51/8511/047RR615 0805, 1%, 47R resistor 51/8511/047RR616 0805, 1%, 47R resistor 51/8511/047RR617 0805, 1%, 1K resistor 51/8511/01K0R618 0805, 1%, 1K resistor 51/8511/01K0R619 0805, 1%, 680R resistor 51/8511/680RR620 0805, 1%, 680R resistor 51/8511/680RR621 0805, 1%, 4K7 resistor 51/8511/04K7R622 0805, 1%, 5K6 resistor 51/8511/05K6R623 0805, 1%, 5K6 resistor 51/8511/05K6R624 0805, 1%, 22K resistor 51/8511/022KR625 0805, 1%, 22K resistor 51/8511/022KR628 1218 1W 68R resistor 51/8251/068RR629 0805, 1%, 270K resistor 51/8511/270KR630 0805, 1%, 120R resistor 51/8511/120RR631 0805, 1%, 47R resistor 51/8511/047RR632 0805, 1%, 47R resistor 51/8511/047RR633 1206 120R resistor 51/3380/0120R634 0805, 1%, 120R resistor 51/8511/120RR635 0805, 1%, 560R resistor 51/8511/560RR636 0805, 1%, 220R resistor 51/8511/220RR637 0805, 1%, 5K6 resistor 51/8511/05K6
T50 PARTS LISTPage 56 RF Technology T50Ref Description Part NumberR638 0805, 1%, 5K6 resistor 51/8511/05K6R639 0805, 1%, 1K resistor 51/8511/010KR646 0805, 1%, 4K7 resistor 51/8511/04K7R647 0805, 1%, 1K resistor 51/8511/010KR648 0805, 1%, 4K7 resistor 51/8511/04K7R649 0805, 1%, 1K resistor 51/8511/010KR650 0805, 1%, 5K6 resistor 51/8511/05K6R700 0805, 1%, 120R resistor 51/8511/120RR701 0805, 1%, 47R resistor 51/8511/047RR702 0805, 1%, 120R resistor 51/8511/120RR703 0805, 1%, 120R resistor 51/8511/120RR704 0805, 1%, 120R resistor 51/8511/120RR705 0805, 1%, 220R resistor 51/8511/220RR706 0805, 1%, 220R resistor 51/8511/220RR707 0805, 1%, 220R resistor 51/8511/220RR708 0805, 1%, 4K7 resistor 51/8511/04K7R709 0805, 1%, 1K resistor 51/8511/010KR710 0805, 1%, 2K2 resistor 51/8511/02K2R711 0805, 1%, 100K resistor 51/8511/100KR713 0805, 1%, 100K resistor 51/8511/100KR714 0805, 1%, 56R resistor 51/8511/056RR715 0805, 1%, 1K resistor 51/8511/010KR716 0805, 1%, 47R resistor 51/8511/047RR717 0805, 1%, 1K resistor 51/8511/010KR718 0805, 1%, 120R resistor 51/8511/120RR719 0805, 1%, 1K resistor 51/8511/010KR720 0805, 1%, 100K resistor 51/8511/100KR722 0805, 1%, 22K resistor 51/8511/022KR723 0805, 1%, 1K resistor 51/8511/010KR724 0805, 1%, 56R resistor 51/8511/056RR725 0805, 1%, 22K resistor 51/8511/022KR726 0805, 1%, 47R resistor 51/8511/047RR727 0805, 1%, 22K resistor 51/8511/022KR729 0805, 1%, 10R resistor 51/8511/010RR730 0805, 1%, 220R resistor 51/8511/220RR731 0805, 1%, 560R resistor 51/8511/560RR732 0805, 1%, 22K resistor 51/8511/022KR733 0805, 1%, 330R resistor 51/8511/330RR734 0805, 1%, 4K7 resistor 51/8511/04K7R735 0805, 1%, 22K resistor 51/8511/022KR736 0805, 1%, 1K resistor 51/8511/01K0R737 0805, 1%, 1K resistor 51/8511/01K0R738 0805, 1%, 220R resistor 51/8511/220RR739 0805, 1%, 1K resistor 51/8511/010KR740 0805, 1%, 120R resistor 51/8511/120RR741 0805, 1%, 4K7 resistor 51/8511/04K7R742 0805, 1%, 820R resistor 51/8511/820RR743 0805, 1%, 560R resistor 51/8511/560RR744 0805, 1%, 1K resistor 51/8511/010KR745 0805, 1%, 220R resistor 51/8511/220RR802 0805, 1%, 47R resistor 51/8511/047R
T50 PARTS LISTRF Technology T50 Page 57Ref Description Part NumberR803 0805, 1%, 100R resistor 51/8251/100RR804 1206 10R resistor 51/3380/0010R805 1206 10R resistor 51/3380/0010R806 0805, 1%, 100R resistor 51/8251/100RR807 0805, 1%, 100R resistor 51/8251/100RR808 0805, 1%, 10R resistor 51/8511/010RR809 0805, 1%, 27R resistor 51/8511/027RR810 0805, 1%, 10R resistor 51/8511/010RR811 0805, 1%, 27R resistor 51/8511/027RR812 0805, 1%, 220R resistor 51/8511/220RR813 0805, 1%, 100R resistor 51/8251/100RR816 0805, 1%, 1K resistor 51/8511/010KR819 7W Axial 68R resistor 55/5W51/068RR823 0805, 1%, 4K7 resistor 51/8511/04K7R918 0805, 1%, 47K resistor 51/8511/047KR919 0805, 1%, 47K resistor 51/8511/047KR920 0805, 1%, 1K resistor 51/8511/01K0R921 0805, 1%, 560R resistor 51/8511/560RR922 0805, 1%, 220R resistor 51/8511/220RR923 0805, 1%, 1K resistor 51/8511/01K0R924 0805, 1%, 560R resistor 51/8511/560RR925 0805, 1%, 220R resistor 51/8511/220RR926 0805, 1%, 2K2 resistor 51/8511/02K2R927 0805, 1%, 220R resistor 51/8511/220RR928 0805, 1%, 220R resistor 51/8511/220RR929 0805, 1%, 220R resistor 51/8511/220RR930 0805, 1%, 220R resistor 51/8511/220RR931 0805, 1%, 220R resistor 51/8511/220RR932 0805, 1%, 220R resistor 51/8511/220RR933 0805, 1%, 560R resistor 51/8511/560RR934 0805, 1%, 560R resistor 51/8511/560RR935 0805, 1%, 120R resistor 51/8511/120RR936 0805, 1%, 120R resistor 51/8511/120RRL300 12V Telecommunications DPDT Relay 96/2000/012VRV100 100K, 11 turn, linear Pot. 53/THH1/100KS200 4mm SMD PB switch 31/SMPB/0001SW1 C&K PB Switch 31/0005/E121T300 High Isolation Audio Transformer 37/2040/5065T301 High Isolation Audio Transformer 37/2040/5065TP102 Test Point 35/2501/0001TP300 Test Point 35/2501/0001TP301 Test Point 35/2501/0001TP302 Test Point 35/2501/0001TP303 Test Point 35/2501/0001TP305 Test Point 35/2501/0001TP500 Test Point 35/2501/0001TP501 Test Point 35/2501/0001TP908 Test Point 35/2501/0001TP909 Test Point 35/2501/0001TP910 Test Point 35/2501/0001TP911 Test Point 35/2501/0001
T50 PARTS LISTPage 58 RF Technology T50Ref Description Part NumberTP912 Test Point 35/2501/0001TP913 Test Point 35/2501/0001TP914 Test Point 35/2501/0001TP915 Test Point 35/2501/0001TP916 Test Point 35/2501/0001TP917 Test Point 35/2501/0001U201 Quad CMOS RS232 Driver SMD (SO-14) 29/14C8/9A01U202 Quad CMOS RS232 Driver SMD (SO-14) 29/14C8/8001U203 Under-voltage sensor and Reset Generator 29/MC33/064DU204 Motorola Embedded 8/16 bit microcontroller 29/68HC/12A0U205 One of 8 Selector 29/2030/C138U207 4 Megabyte TSOP (Std.) 5V (only) Flash 29/P006/0001U208 1,2,4 Megabit RAM in SOP package 29/SRAM/P013U209 Octal Latch 29/2030/C374U212 Hi Speed, TTL compatible, opto-isolator 26/N137/0001U300 Opto-isolator with Darlington Output 25/1010/4N35U301 Quad SPST Analog Switch - low Rds On 29/00DG/411CU302 Low Power Quad Operational Amplifier 29/000L/M224U303 32 position digital pot. 29/MAX5/161LU400 Low Power Quad Operational Amplifier 29/000L/M224U401 8-bit Shift reg. with output latch 29/2030/C595U402 Transconductance Amplifier 29/0LM1/3700U403 Quad SPST Analog Switch - low Rds On 29/00DG/411CU404 Quad SPST Analog Switch - low Rds On 29/00DG/411CU405 Low Power Quad Operational Amplifier 29/000L/M224U406 Voltage Output, Quad 8 bit DAC 29/00MA/X534U407 Low Power Quad Operational Amplifier 29/000L/M224U500 CTCSS and DCS encoder/decoder 29/00FX/805LU502 Low Power Quad Operational Amplifier 29/000L/M224U503 32 position digital pot. 29/MAX5/161LU600 Gen. Purp. R2R Op. Amp. 29/1M55/P021U601 Voltage Output, Quad 8 bit DAC 29/00MA/X534U602 Dual PLL 29/LMX2/335LU603 Temperature Sensor 29/0001/LM61U604 Dual PLL 29/LMX2/335LU605 Dual, Ripple Carry, 4 bit binary counter 29/2030/C393U606 Dual 4 bit, ripple carry, decade counters 29/2030/C390U607 Gen. Purp. R2R Op. Amp. 29/1M55/P021U608 Gen. Purp. R2R Op. Amp. 29/1M55/P021U700 MMIC Amplifier 24/3010/VAM6U701 MMIC Amplifier 24/3010/211LU702 MMIC Amplifier 24/3010/VAM6U703 MMIC Amplifier 24/3010/VAM6U704 Transconductance Amplifier 29/0LM1/3700U705 MMIC Amplifier 24/3010/VAM6U706 MMIC Amplifier 24/3010/VAM6U707 Gen. Purp. R2R Op. Amp. 29/1M55/P021U800 MMIC Amplifier 24/3010/211LU906 Gen. Purp. R2R Op. Amp. 29/1M55/P021U907 Simple (Buck) Switcher, 5V, 1A output 29/REG1/0N12U908 Simple (Buck) Switcher, 5V, 1A output 29/REG1/0N12
T50 PARTS LISTRF Technology T50 Page 59Ref Description Part NumberU909 Simple (Buck) Switcher, 5V, 1A output 29/REG2/00N5U910 LDO Adjustable Positive Voltage Regulator(800mA) 29/00LM/1117U911 Positive Adjustable Voltage Reg. in SO8 package 29/000L/M317U912 Positive Adjustable Voltage Reg. in SO8 package 29/000L/M317U913 Positive Adjustable Voltage Reg. in SO8 package 29/000L/M337U914 Positive Adjustable Voltage Reg. in SO8 package 29/000L/M337U915 Positive Adjustable Voltage Reg. in SO8 package 29/000L/M337X200 14.7456 MHz Crystal, 30ppm, SMD 33/14M7/0001X500 4.0 MHz Crystal 32/2049/04M0X600 12.0 MHz Crystal, 5ppm, SMD 33/12M0/0001X601 12.0 MHz Crystal, 5ppm, SMD 33/12M0/0001
Page 60 RF Technology T50C – EIA CTCSS TONESFrequency EIA NumberNo Tone67.0 A171.9 B174.4 C177.0 A279.7 C282.5 B285.4 C388.5 A391.5 C494.8 B3100.0 A4103.5 B4107.2 A5110.9 B5114.8 A6118.8 B6123.0 A7127.3 B7131.8 A8136.5 B8141.3 A9146.2 B9151.4 A10156.7 B10162.2 A11167.9 B11173.8 A12179.9 B12186.2 A13192.8 B13203.5 A14210.7 B14218.1 A15225.7 B15233.6 A16241.8 B16250.3 A17

Navigation menu