JL MARINE SYSTEMS EA041 MICRO SHALLOW WATER ANCHOR User Manual Bluetooth technology class 2 module

JL MARINE SYSTEMS, INC. MICRO SHALLOW WATER ANCHOR Bluetooth technology class 2 module

Contents

Bluetooth Module

This is information on a product in full production. August 2012 Doc ID 022833 Rev 4 1/2727SPBT2632C2ABluetooth® technology class-2 moduleDatasheet − production dataFeatures■Bluetooth® radio– Fully embedded Bluetooth® v3.0 with profiles– Class 2 module– Complete RF ready module– 128-bit encryption security– Integrated antenna – Multipoint capability■ST micro Cortex-M3 microprocessor up to 72 MHz■Memory– 256 kb Flash memory– 48 kb RAM memory■Data rate– 1.5 Mbps maximum data rate■Serial interface– UART up to 2.0 Mbps– SPI interface■General I/O– 7 general purpose I/Os– 1 LPO input■User interface– AT2 command set (abSerial)– Firmware upgrade over UART■FCC and Bluetooth® qualified■EPL (end product listing) fulfilled■Single voltage supply: 2.5 V typical■Micro-sized form factor: 11.6 x 13.5 x 2.9 mm■Operating temperature range: -40 °C to 85 °C. www.st.com
Contents SPBT2632C2A2/27 Doc ID 022833 Rev 4Contents1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 RoHS compliance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 Software architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84.1 Lower layer stack . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84.2 Upper layer stack: Amp'ed UP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84.3 AT command set: abSerial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84.4 Bluetooth firmware implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95 Hardware specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105.1 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105.2 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105.3 High speed CPU mode current consumption . . . . . . . . . . . . . . . . . . . . . . 115.4 Standard CPU mode current consumption . . . . . . . . . . . . . . . . . . . . . . . . 115.5 I/O operating characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125.6 Selected RF characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125.7 Pin assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135.8 Pin placement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145.9 Layout drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 146 Hardware block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 157 Hardware design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 167.1 Module reflow installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 167.2 GPIO interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 177.3 UART interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 177.4 PCB layout guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 187.5 Reset circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 197.5.1 External reset circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 197.5.2 Internal reset circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
SPBT2632C2A ContentsDoc ID 022833 Rev 4 3/277.6 External LPO input circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 207.7 Apple iOS CP reference design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 218 Regulatory compliance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 239 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2510 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
List of tables SPBT2632C2A4/27 Doc ID 022833 Rev 4List of tablesTable 1. Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10Table 2. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10Table 3. High speed CPU mode current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11Table 4. Standard CPU mode current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11Table 5. I/O operating characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12Table 6. Selected RF characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12Table 7. Pin assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13Table 8. Soldering. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16Table 9. System configuration variables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20Table 10. Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25Table 11. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
SPBT2632C2A List of figuresDoc ID 022833 Rev 4 5/27List of figuresFigure 1. FW architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9Figure 2. Pin placement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14Figure 3. Layout drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14Figure 4. SPBT2632C2A.AT2 module block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15Figure 5. Soldering profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17Figure 6. Connection to host device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17Figure 7. Typical RS232 circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18Figure 8. PCB layout guidelines. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18Figure 9. External reset circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19Figure 10. Internal reset circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19Figure 11. External LPO circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20Figure 12. BT module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21Figure 13. Co-processor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21Figure 14. Power switch. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Description SPBT2632C2A6/27 Doc ID 022833 Rev 41 DescriptionThe SPBT2632C2A.AT2 is an easy to use Bluetooth module, compliant with Bluetooth v3.0.The module is the smallest form factor available which provides a complete RF platform. The SPBT2632C2A.AT2 enables electronic devices with wireless connectivity, not requiring any RF experience or expertise for integration into the final product. The SPBT2632C2A.AT2 module, being a certified solution, optimizes the time to market of the final applications.The module is designed for maximum performance in a minimal space including fast speed UART and 7 general purpose I/O lines, several serial interface options, and up to 1.5 Mbps data throughput.Optimized design allows the integration of a complete working Bluetooth modem, including antenna, in the minimum possible size; only an additional external LPO (low power oscillator) is required to enable low power mode capability.The SPBT2632C2A.AT2 is a surface mount PCB module that provides fully embedded, ready to use Bluetooth wireless technology. The reprogrammable Flash memory contains embedded firmware for serial cable replacement using the Bluetooth SPP profile. Embedded Bluetooth AT2 command firmware is a friendly interface, which realizes a simple control for cable replacement, enabling communication with most Bluetooth enabled devices, provided that the devices support the SPP profile. The SPBT2632C2A.AT2 , supporting iAP profile, provides communication with Android, smartphone, and Apple® iOS Bluetooth enabled devices.An Apple authentication IC is required to exchange data with an Apple device or access an Apple device application. The AT2 FW includes the Bluetooth SPP profile capable of recognizing the Apple authentication chip.Customers using the Apple authentication IC must register as developers to become an Apple certified MFI member. License fees may apply, for additional information visit: http://developer.apple.com/programs/which-program/index.html.Certified MFI developers developing electronic accessories that connect to the iPod®, iPhone®, and iPad® gain access to technical documentation, hardware components, technical support and certification logos.Customized firmware for peripheral device interaction, power optimization, security, and other proprietary features may be supported and can be ordered pre-loaded and configured.
SPBT2632C2A RoHS complianceDoc ID 022833 Rev 4 7/272 RoHS complianceST modules are RoHS compliant and comply with ECOPACK® norms.3 Applications●Serial cable replacement●M2M industrial control●Service diagnostic●Data acquisition equipment●Machine control●Sensor monitoring●Security system●Mobile health.
Software architecture SPBT2632C2A8/27 Doc ID 022833 Rev 44 Software architecture4.1 Lower layer stack ●Bluetooth v3.0 ●Device power modes: active, sleep and deep sleep●Wake on Bluetooth feature optimized power consumption of host CPU●Authentication and encryption●Encryption key length from 8 bits to 128 bits●Persistent Flash memory for BD address and user parameter storage●All ACL (asynchronous connection less) packet types ●Multipoint capability●Sniff mode: fully supported to maximum allowed intervals●Master slave switch supported during connection and post connection●Dedicated inquiry access code for improved inquiry scan performance●Dynamic packet selection channel quality driven data rate to optimize link performance●Dynamic power control ●802.11b co-existence AFH.4.2 Upper layer stack: Amp'ed UP●SPP, IAP, SDAP and GAP protocols●RFComm, SDP, and L2CAP supported●Multipoint with simultaneous slaves.4.3 AT command set: abSerialPlease see command list reported in the SPBT2532C2.AT datasheet, Appendix D, for details.The complete command list including the iAP commands will be reported in the user manual UM1547.
SPBT2632C2A Software architectureDoc ID 022833 Rev 4 9/274.4 Bluetooth firmware implementationFigure 1. FW architecture!-VI!0
Hardware specifications SPBT2632C2A10/27 Doc ID 022833 Rev 45 Hardware specificationsGeneral conditions (VIN = 2.5 V and 25 °C). 5.1 Recommended operating conditions5.2 Absolute maximum ratingsTable 1. Recommended operating conditionsRating Min. Typical Max. UnitOperating temperature range -40 - 85 °CSupply voltage VIN 2.1 2.5 3.6 VSignal pin voltage - 2.1 - VRF frequency 2400 - 2483.5 MHzTable 2. Absolute maximum ratingsRating Min. Typical Max. UnitStorage temperature range -55 - +105 °CSupply voltage, VIN -0.3 - + 5.0 VI/O pin voltage, VIO -0.3 - + 5.5 VRF input power - - -5 dBm
SPBT2632C2A Hardware specificationsDoc ID 022833 Rev 4 11/275.3 High speed CPU mode current consumption●High speed CPU mode– CPU 32 MHz– UART supports up to 921 Kbps– Data throughput up to 1.5 Mbps– Shallow sleep enabled.5.4 Standard CPU mode current consumption●Standard CPU mode–CPU 8 MHz– UART supports up to 115 Kbps– Data throughput up to 200 Kbps– Shallow sleep enabled.Table 3. High speed CPU mode current consumptionModes (typical power consumption) Avg. UnitACL data 115 K baud UART at max. throughput (master) 23 mAACL data 115 K baud UART at max. throughput (slave) 27.5 mAConnection, no data traffic, master 9.1 mAConnection, no data traffic, slave 11.2 mAConnection 375 ms sniff (external LPO required) 490 µAStandby, without deep sleep 8.6 mAStandby, with deep sleep, no external LPO 1.7 mAStandby, with deep sleep, with external LPO 70 µAPage/inquiry scan, with deep sleep, no external LPO 2.7 mAPage/inquiry scan, with deep sleep, with external LPO 520 µABluetooth power down / CPU standby, no external LPO 25 µATable 4. Standard CPU mode current consumptionModes (typical power consumption) Avg. UnitACL data 115 K baud UART at max. throughput (master) 16.7 mAACL data 115 K baud UART at max. throughput (slave) 18 mAConnection, no data traffic, master 4.9 mAConnection, no data traffic, slave 7.0 mAConnection 375 ms sniff (external LPO required) 490 µAStandby, without deep sleep 4.2 mAStandby, with deep sleep, no external LPO 1.7 mA
Hardware specifications SPBT2632C2A12/27 Doc ID 022833 Rev 45.5 I/O operating characteristics5.6 Selected RF characteristicsStandby, with deep sleep, with external LPO 70 µAPage/inquiry scan, with deep sleep, no external LPO 2.6 mAPage/inquiry scan, with deep sleep, with external LPO 520 µABluetooth power-down / CPU standby, no external LPO 25 µATable 4. Standard CPU mode current consumption (continued)Modes (typical power consumption) Avg. UnitTable 5. I/O operating characteristicsSymbol Parameter Min. Max. Unit ConditionsVIL Low-level input voltage - 0.6 V VIN, 2.1 VVIH High-level input voltage 1.4 - V VIN, 2.1 VVOL Low-level output voltage - 0.4 V VIN, 2.1 VVOH High-level output voltage 1.8 - V VIN, 2.1 VIOL Low -level output current - 4.0 mA VOL = 0.4 VIOH High-level output current - 4.0 mA VOH = 1.8 VRPU Pull-up resistor 80 120 kΩResistor turned onRPD Pull-down resistor 80 120 kΩResistor turned onTable 6. Selected RF characteristicsParameters Conditions Typical(1)1. RF characteristics can be influenced by physical characteristics of final application.UnitAntenna load 50 ohmRadio receiverSensitivity level BER < .001 with DH5 -86 dBmMaximum usable level BER < .001 with DH1 0 dBmInput VSWR 2.5:1Radio transmitterMaximum output power 50 Ω load 0 dBmInitial carrier frequency tolerance 0 kHz20 dB bandwidth for modulated carrier 935 kHz
SPBT2632C2A Hardware specificationsDoc ID 022833 Rev 4 13/275.7 Pin assignmentTable 7. Pin assignmentName Type Pin# Description ALT function(1)1. Please note that the usage of ALT function is dependant upon the firmware that is loaded into the module, and is beyond the scope of this document. The AT command interface uses the main UART by default.5 V tolerantUART interfaceRXD I 13 Receive data ADC 3 YTXD O 14 Transmit data ADC 2 YRTS O 12 Request to send (active low) ADC 0 I2C clock/aux UART Rx YCTS I 11 Clear to send (active low) ADC 1 I2C data/aux UART Tx YBoot loaderBoot 0 I 9 Boot 0Power and groundVin 8 VinGND 7 GNDResetRESETN I 10 Reset input (active low for 5 ms) 2.5 V max.LPOLPO I 15 LPO inputGPIO - general purpose input/outputGPIO [1] I/O 1 General purpose input/output SPI MISO YGPIO [2] I/O 2 General purpose input/output SPI MOSI/I2S_SD YGPIO [3] I/O 3 General purpose input/output SPI SCLK/I2S_CK YGPIO [4] I/O 4 General purpose input/output SPI SS/I2S_WS YGPIO [5] I/O 5 General purpose input/output YGPIO [6] I/O 6 General purpose input/output DAC YGPIO [7] I/O 16 General purpose input/output ADC 4 Y
Hardware specifications SPBT2632C2A14/27 Doc ID 022833 Rev 45.8 Pin placementFigure 2. Pin placement5.9 Layout drawingFigure 3. Layout drawing!-VMILLIMETERS3IZEMMXMMXMMHEIGHTTOLERANCEMM!-V
SPBT2632C2A Hardware block diagramDoc ID 022833 Rev 4 15/276 Hardware block diagramFigure 4. SPBT2632C2A.AT2 module block diagram%DWWHU\RU6XSSO\5HJXODWRU$QWHQQD+RVW&RQWUROOHU,QWHUIDFH67/&%3)LOWHU/32&ORFN,63&0.)ODVK.5$08$57$50&RUWH[0&8670*3,28$57!-V
Hardware design SPBT2632C2A16/27 Doc ID 022833 Rev 47 Hardware designThe SPBT2632C2A module without AT2 command embedded FW supports UART, SPI, I2C and GPIO hardware interfaces. Note that the usage of these interfaces is dependent upon the firmware that is loaded into the module, and is beyond the scope of this document. The AT2 command interface uses the main UART by default.Note: 1 All unused pins should be left floating; do not ground.2 All GND pins must be well grounded.3 The area around the module should be free of any ground planes, power planes, trace routings, or metal for 6 mm from the antenna in all directions.4 Traces should not be routed underneath the module.7.1 Module reflow installationThe SPB2632C2A is a surface mount Bluetooth module supplied on a 16-pin, 6-layer PCB. The final assembly recommended reflow profiles are indicated here below.The soldering phase must be executed with care: In order to avoid undesired melting phenomenon, particular attention must be paid to the setup of the peak temperature.The following are some suggestions for the temperature profile based on IPC/JEDEC J-STD-020C, July 2004 recommendations.Table 8. SolderingProfile feature PB-free assemblyAverage ramp-up rate (TSMAX to TP) 3 °C/sec maxPreheat:– Temperature min. (TS min.)– Temperature max. (TS max.)–Time (ts min. to ts max.)(ts)150 °C200 °C60-100 secTime maintained above:– Temperature TL– Temperature TL217 °C60-70 secPeak temperature (TP) 240 + 0 °CTime within 5 °C of actual peak temperature (TP) 10-20 secRamp-down rate 6 °C/secTime from 25 °C to peak temperature 8 minutes max.
SPBT2632C2A Hardware designDoc ID 022833 Rev 4 17/27Figure 5. Soldering profile7.2 GPIO interfaceAll GPIOs are capable of sinking and sourcing 4 mA of I/O current. GPIO [1] to GPIO [7] are internally pulled down with 100 kΩ (nominal) resistors.7.3 UART interfaceThe UART is compatible with the 16550 industry standard. Four signals are provided with the UART interface. The TXD and RXD pins are used for data while the CTS and RTS pins are used for flow control.Figure 6. Connection to host device!-V"LUETOOTH-ODULE(OST!-V
Hardware design SPBT2632C2A18/27 Doc ID 022833 Rev 4Figure 7. Typical RS232 circuit7.4 PCB layout guidelinesFigure 8. PCB layout guidelines!-VSURROUNDING!-V
SPBT2632C2A Hardware designDoc ID 022833 Rev 4 19/277.5 Reset circuitTwo types of system reset circuits are detailed below.7.5.1 External reset circuitFigure 9. External reset circuitNote: RPU ranges from 30 kΩ to 50 kΩ internally.7.5.2 Internal reset circuitFigure 10. Internal reset circuitNote: 1 RPU ranges from 30 kΩ to 50 kΩ internally.2RRST should be from 1 kΩ to 10 kΩ.2%3%4!-V2%3%4!-V
Hardware design SPBT2632C2A20/27 Doc ID 022833 Rev 47.6 External LPO input circuit An optional low power oscillator input may be added to allow Deep sleep and Sniff modes. ●LPO parameters:– Frequency: 32.768 kHz – Tolerance: 150 ppm – Voltage levels –Low: 0.5 V – High: 1.8 V – Input capacitance: 2.5 pF maximum ●Configurations: – Use two configuration variables: UseExtLPO and AllowSniff. Figure 11. External LPO circuitTable 9. System configuration variablesVariable Name Default DescriptionVar37 UseExtLPO True True when a 32.768 kHz low power oscillator is present, and false if not present Var43 AllowSniff True Enables Sniff mode. +(ZOSCILLATOR55'0)/'0)/'0)/'0)/'0)/'0)/'.$6). "//4 2%3% 4 #43 243 28$ 48$ ,0/'0)/30"4#!!4!-V
SPBT2632C2A Hardware designDoc ID 022833 Rev 4 21/277.7 Apple iOS CP reference designThe figures below give an indicative overview of what the hardware concept looks like. A specific MFI co-processor layout is available for licensed MFI developers from the MFI program.Figure 12. BT moduleFigure 13. Co-processor!-V!-V
Hardware design SPBT2632C2A22/27 Doc ID 022833 Rev 4Figure 14. Power switch!-V
SPBT2632C2A Regulatory complianceDoc ID 022833 Rev 4 23/278 Regulatory compliance●FCC and IC– This module has been tested and found to comply with the FCC part 15 and IC RSS-210 rules. These limits are designed to provide reasonable protection against harmful interference in approved installations. This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference may not occur in a particular installation. This device complies with part 15 of the FCC rules. Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. Modifications or changes to this equipment not expressly approved by the part responsible for compliance may render void the user's authority to operate this equipment.– Modular approval, FCC and ICFCC ID: X3ZBTMOD4IC: 8828A-MOD4In accordance with FCC part 15, the SPBT2632C2A.AT2 is listed above as a modular transmitter device.– Label instructionsWhen integrating the SPBT2632C2A.AT2 into the final product, it must be ensured that the FCC labelling requirements, as specified below, are satisfied. Based on the Public Notice from FCC, the product into which the ST transmitter module is installed must display a label referring to the enclosed module. The label should use wording such as the following:Contains Transmitter Module FCC ID: X3ZBTMOD4IC: 8828A-MOD4Any similar wording that expresses the same meaning may be used. ●BQB– BQB qualified design, QD ID: B019224– Product type: End Product– TGP version: Core 3.0– Core spec version: 3.0– Product descriptions: Bluetooth module, spec V3.0
Regulatory compliance SPBT2632C2A24/27 Doc ID 022833 Rev 4 ●CE– CE Expert opinion: 0448-ARAM00003– Measurements have been performed in accordance with (report available on request):– EN 300 328 V 1.7.1 (2006-10) (a)– EN 301 489-17 V 2.1.1 (2009) (b)– EN60950-1:2006 +A11:2009+A1:2010 (c)CE certified: a. EN 300 328 V 1.7.1 (2006-10): “electromagnetic compatibility and radio spectrum Matters (ERM); Wideband transmission systems; data transmission equipment operating in the 2.4 GHZ ISM band and using wideband modulation techniques; harmonized EN covering essential requirements under article 3.2 of the R&TTE directive”.b. EN 301 489-17 V 2.1.1 (2009): “electromagnetic compatibility and radio spectrum Matters (ERM); electromagnetic compatibility (EMC) standard for radio equipment and services; part 17: specific condition for 2.4 GHz wideband transmission systems and 5 GHz high performance RLAN equipment”.c. EN60950-1:2006 +A11:2009+A1:2010: “Information technology equipment - safety”.
SPBT2632C2A Ordering informationDoc ID 022833 Rev 4 25/279 Ordering informationTable 10. Ordering informationOrder code DescriptionSPBT2632C2A.AT2 Class 2 OEM Bluetooth antenna module
Revision history SPBT2632C2A26/27 Doc ID 022833 Rev 410 Revision historyTable 11. Document revision historyDate Revision Changes03-Apr-2012 1 First release.16-Apr-2012 2 Modified: Section 812-Jun-2012 3– Document status promoted from preliminary data to production data– Modified: Figure 107-Aug-2012 4 – Added: notes in Ta b l e 6 and 7– Modified: Section 7
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