HARRIS TR-0017-E Sitepro Base Station User Manual Site Pro Manual Part 1

HARRIS CORPORATION Sitepro Base Station Site Pro Manual Part 1

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Site Pro Manual Part 1

Maintenance ManualMM101271V1 R2ASitePro™ ControllerShelf Assembly EA101209V1

ADDENDUM NUMBER 1 TO SITEPRO MAINTENANCE MANUALMM101271V1 R2AThis addendum adds an improved high-speed data (HSD) adjustment procedure to the following manuals:• SitePro Controller Maintenance Manual MM101271V1 R2A• SitePro Simulcast Controller Card Maintenance Manual MM101509V1 R1A• GPS Simulcast Systems (with SIM and SitePro Controllers)System Alignment and Field Testing Procedures MM101724V1 R1AThis improved procedure allows the adjustment to be made on-the-fly without the need to put the SiteProController into Test Mode. The adjustment range is the same as with the earlier procedure [two hexadecimaldigits 00-FF]. The values entered will take effect immediately. By writing these values to EEprom they willpersist through a reset. From a hyper-terminal connected to the SitePro Controller serial port1 perform thefollowing:HIGH-SPEED DATA ADJUSTMENT PROCEDUREAdjust HSD by modifying the pot setting. Once the correct level is found it must be stored in permanentmemory.1. Adjust the 'real time' high-speed level:SI2C 50 1 5 <rtn> sets slave device for all subsequent read/write operations (50 is EE pot)2. Read current data from the HSD pot:RI2C A9 A9 <rtn> reads current data at specified address range (A9 is location of the HSD pot)3. Write new values to the HSD pot. The value from step 2 provides an initial set point. The command towrite a value is:WI2C A9 xx <rtn> were xx is the hexadecimal value written to the HSD pot. Write new valuesuntil the desired deviation is achieved.4. Store the new value which achieves the desired deviation into permanent memory (novRAM) using thefollowing commands:SI2C A6 2 5 <rtn> sets slave device for all subsequent read/write operations (A6 is EEprom)WI2C 03 xx <rtn> writes new value of the HSD Pot in EEprom (03 is location of HS level)RI2C 03 03 <rtn> reads current value of the HSD Pot from EEprom (to check if writtencorrectly) 1 This procedure can also be performed through an ethernet port. Refer to the applicable manual for instructions.

2MM101271V1 R2ANOTICE!This manual covers products manufactured and sold by M/A-COM Private Radio Systems, Inc.NOTICE!Repairs to this equipment should be made only by an authorized service technician or facility designated by the supplier. Anyrepairs, alterations or substitution of recommended parts made by the user to this equipment not approved by themanufacturer could void the user's authority to operate the equipment in addition to the manufacturer's warranty.NOTICE!The software contained in this device is copyrighted by M/A-COM Private Radio Systems, Inc. Unpublished rights arereserved under the copyright laws of the United States.This manual is published by M/A-COM Private Radio Systems, Inc. without any warranty. Improvements and changes to this manual necessitated bytypographical errors, inaccuracies of current information, or improvements to programs and/or equipment, may be made by M/A-COM Private RadioSystems, Inc., at any time and without notice. Such changes will be incorporated into new editions of this manual. No part of this manual may bereproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, for any purpose, without theexpress written permission of M/A-COM Private Radio Systems, Inc.EDACS is a registered trademark, and Aegis, ProVoice, GETC and SitePro are trademarks of M/A-COM Private Radio Systems, Inc.Copyright 2002, M/A-COM Private Radio Systems, Inc. All rights reserved.

TABLE OF CONTENTSMM101271V1 R2A 3TABLE OF CONTENTSPage1.0 SPECIFICATIONS ................................................................................................................................................32.0 RELATED PUBLICATIONS................................................................................................................................33.0 SAFETY SYMBOLS AND INFORMATION......................................................................................................34.0 INTRODUCTION ..................................................................................................................................................34.1 OVERVIEW.............................................................................................................................................................34.2 OPERATIONAL FEATURES ......................................................................................................................................34.3 OPTIONS AND ACCESSORIES ..................................................................................................................................34.4 SUMMARY..........................................................................................................................................................35.0 MAINTENANCE AND SERVICE .......................................................................................................................35.1 APPLICATIONS ..................................................................................................................................................35.2 COMPATIBILITY AND MIGRATION ..............................................................................................................35.3 SYSTEM EXTERNAL INTERFACES................................................................................................................35.3.1 Station Control ............................................................................................................................................35.3.2 Simulcast Control........................................................................................................................................35.3.3 Conventional Control..................................................................................................................................35.3.4 Voter Control...............................................................................................................................................35.3.5 Asynchronous Serial Ports ..........................................................................................................................35.3.6 Synchronous Serial Ports ............................................................................................................................35.3.7 Power ..........................................................................................................................................................36.0 DESCRIPTION ......................................................................................................................................................36.1 INDICATORS AND CONTROLS.......................................................................................................................36.1.1 Indicators ....................................................................................................................................................36.1.2 Controls.......................................................................................................................................................36.2 ROCKWELL MODEM ........................................................................................................................................36.3 LOW SPEED AND HIGH SPEED DATA FILTERS..........................................................................................36.3.1 Low Speed Data Decode Filter ...................................................................................................................36.3.2 High Speed Data Encode Filter...................................................................................................................36.4 INTERFACE CONNECTIONS ...........................................................................................................................36.5 COMMUNICATION LINKS ...............................................................................................................................37.0 CIRCUIT ANALYSIS............................................................................................................................................37.1 SHELF ASSEMBLY ............................................................................................................................................37.2 INTERCONNECT BOARD (A1).........................................................................................................................37.3 CONTROLLER BOARD (A2).............................................................................................................................37.3.1 Block Diagram ............................................................................................................................................37.3.2 System I/O ...................................................................................................................................................37.3.3 Backplane....................................................................................................................................................37.3.4 CPU.............................................................................................................................................................37.3.5 SitePro Modem Board Connector ...............................................................................................................37.3.6 Electrically Programmable Logic Device (EPLD)......................................................................................37.3.7 Ethernet Ports..............................................................................................................................................37.3.8 I2C Bus.........................................................................................................................................................37.3.9 Memory........................................................................................................................................................37.4 SITEPRO MODEM BOARD..................................................................................................................................37.4.1 Modems .......................................................................................................................................................37.4.2 3.3V/5V Interface.........................................................................................................................................37.4.3 Microprocessor ...........................................................................................................................................37.4.4 Code Memory ..............................................................................................................................................37.4.5 Data Memory...............................................................................................................................................3

TABLE OF CONTENTS4MM101271V1 R2ATABLE OF CONTENTSPage7.4.6 Dual Port Ram............................................................................................................................................ 37.4.7 Troubleshooting Aids.................................................................................................................................. 37.5 ROCKWELL MODEM INTERFACE CARD (A3) ............................................................................................ 37.6 ANALOG BOARD (A4) ..................................................................................................................................... 37.6.1 Quad ADC and Single DAC ....................................................................................................................... 37.6.2 8-Bit I/O Expander for I2C Bus................................................................................................................... 37.6.3 –5 Volt Generation ..................................................................................................................................... 37.6.4 High-Speed Data Transmit Filters.............................................................................................................. 37.6.5 Clock Generation........................................................................................................................................ 37.6.6 Low -Speed Data Decode Filters and Slicer............................................................................................... 37.6.7 Low Speed Data Encode Filter................................................................................................................... 37.6.8 Simulcast Control Circuits.......................................................................................................................... 37.7 POWER SUPPLY (A5) PS101328V1 ................................................................................................................. 37.8 MISCELLANEOUS INFORMATION................................................................................................................ 37.8.1 Serial Port Data Format............................................................................................................................. 38.0 PERSONALITY PROGRAMMING ................................................................................................................... 38.1 PROGRAMMING A PERSONALITY ............................................................................................................... 39.0 TROUBLESHOOTING ........................................................................................................................................ 39.1 ON SITE TROUBLESHOOTING....................................................................................................................... 39.2 IN CASE OF DIFFICULTY ................................................................................................................................ 39.3 SITEPRO SHELF TEST...................................................................................................................................... 39.3.1 Equipment Needed...................................................................................................................................... 39.3.2 RF Data Loop Test...................................................................................................................................... 39.3.3 Modem Loop Test ....................................................................................................................................... 39.3.4 Loopback Connectors ................................................................................................................................. 39.4 FIELD TROUBLESHOOTING GUIDE ............................................................................................................. 39.4.1 SitePro Controller Board ........................................................................................................................... 39.4.2 SitePro Modem Board Tests From The 860 ............................................................................................... 39.4.3 Modem Board Tests Using Simon............................................................................................................... 39.4.4 Analog Board.............................................................................................................................................. 310.0 LIGHTNING PROTECTION GROUNDING .................................................................................................... 311.0 PARTS LIST .......................................................................................................................................................... 312.0 IC DATA................................................................................................................................................................. 312.1 CONTROLLER BOARD (A2)............................................................................................................................ 312.2 SITEPRO MODEM BOARD (A2-A1) .................................................................................................................. 312.3 ANALOG FILTER BOARD (A4)....................................................................................................................... 312.4 DISPLAY MODULE ASSEMBLY (A6) ............................................................................................................ 313.0 PRODUCT STRUCTURE ................................................................................................................................ 14714.0 INTERCONNECTION DIAGRAM ................................................................................................................ 14815.0 ASSEMBLY DIAGRAM .................................................................................................................................. 14916.0 OUTLINE DIAGRAMS.................................................................................................................................... 15016.1 INTERCONNECT BOARD (A1) CB101073V1............................................................................................. 15016.2 CONTROLLER BOARD (A2) CB101069V1................................................................................................. 15116.3 SITEPRO MODEM BOARD (A2-A1) CB101074V1 ....................................................................................... 15216.4 ANALOG BOARD (A4) CB101070V1 .......................................................................................................... 15316.5 DISPLAY MODULE (A6-A1) CB101077V1 ................................................................................................. 154

TABLE OF CONTENTSMM101271V1 R2A 5TABLE OF CONTENTSPage17.0 SCHEMATIC DIAGRAMS ..............................................................................................................................15517.1 INTERCONNECT BOARD (A1) CB101073V1 .............................................................................................15517.2 CONTROLLER BOARD (A2) CB101069V1..................................................................................................15917.2.1 SitePro Board Title Page ........................................................................................................................15917.2.2 Block Diagram ........................................................................................................................................16017.3 SYSTEM I/O ....................................................................................................................................................16117.3.1 Backplane................................................................................................................................................16217.3.2 CPU.........................................................................................................................................................16617.3.3 Modem Board Connector ........................................................................................................................16817.3.4 EPLD.......................................................................................................................................................16917.3.5 Ethernet 10 (10 Mbit PHY)......................................................................................................................17017.3.6 Ethernet 10/100 (10/100 Mbit PHY) .......................................................................................................17117.3.7 I2C Bus.....................................................................................................................................................17217.3.8 Memory....................................................................................................................................................17317.3.9 QUART ....................................................................................................................................................17517.4 SITEPRO MODEM BOARD (A2-A1) CB101074V1........................................................................................17617.5 ANALOG FILTER BOARD (A4) CB101070V1.............................................................................................17817.6 DISPLAY BOARD (A6-A1) CB101077V1.....................................................................................................18118.0 CABLE DIAGRAMS .........................................................................................................................................18218.1 DISPLAY BOARD (A6-W1) DATA CABLE CA101222V1..........................................................................18218.2 13.8V INPUT POWER CABLE (W1) (INPUT) CA101211V1.........................................................................18318.3 POWER CABLE (W2) (OUTPUT) CA101212V1.............................................................................................18418.4 ETHERNET CABLES CA101301V1 THRU V8.............................................................................................18519.0 EPLD DRAWINGS ............................................................................................................................................18619.1 SITEPRO TOP LEVEL ....................................................................................................................................18619.2 LBSW ...............................................................................................................................................................18719.3 FSL ...................................................................................................................................................................18819.4 SYNCHRO .......................................................................................................................................................18919.5 PIN NAMES .....................................................................................................................................................190FIGURESPageFigure 1 - SitePro/Site Interface Module (SIM) Controller......................................................................................... 3Figure 2 - SitePro Controller Shelf Assembly............................................................................................................. 3Figure 3 - SitePro Shelf Assembly Block Diagram..................................................................................................... 3Figure 4 - Controller Board Block Diagram................................................................................................................ 3Figure 5 - Input Circuits U18A thru F, U22B thru D and U23C thru F....................................................................... 3Figure 6 - Input Circuits U22A, E, F, U29D and U32B .............................................................................................. 3Figure 7 - Output Circuits U29B, C, E & F, U33C, E & F and U34A thru F.............................................................. 3Figure 8 - Output Circuits U33B, C, E, F, U34A, B, C, D, E, F and U35C, D, E & F................................................3Figure 9 - Site Pro Modem Board Block Diagram ...................................................................................................... 3Figure 10 - I2C Address............................................................................................................................................... 3Figure 11 - Analog Board Block Diagram................................................................................................................... 3Figure 12 - Programming Hook-Up ............................................................................................................................ 3Figure 13 - Location of Serial Programming Port J8 (Front Left of SitePro Controller with Hinged Door Open) ..... 3Figure 14 - RF Data Signal Path.................................................................................................................................. 3Figure 15 - Phone Line Data Signal Path .................................................................................................................... 3Figure 16 - Loopback Test Connectors ....................................................................................................................... 3

TABLE OF CONTENTS6MM101271V1 R2ATABLE OF CONTENTSPageTABLESTable 1 –Asynchronous Serial Ports............................................................................................................................3Table 2 - Synchronous Serial Ports..............................................................................................................................3Table 3 - Interface Connections...................................................................................................................................3Table 4 - External Processor Interrupt Signals ............................................................................................................3Table 5 - External Chip Select Signals ........................................................................................................................3Table 6 - 10 Mbit Ethernet Connections......................................................................................................................3Table 7 - I2C Bus Addresses ........................................................................................................................................3Table 8 - DRAM Bank Memory Ranges ..................................................................................................................... 3Table 9 - Memory Map................................................................................................................................................ 3Table 10 - 9600 Baud WB Filter Response .................................................................................................................3Table 11 - 4800 Baud NB Filter Response ..................................................................................................................3Table 12 - 9600 Baud WB ETSI Filter Response ........................................................................................................3Table 13 - 4800 Baud NB ETSI Filter Response.........................................................................................................3Table 14 - 9600 Baud NB Filter Response ..................................................................................................................3Table 15 - HSD Selection ............................................................................................................................................3Table 16 - Low Speed Data Decode Filter Response ..................................................................................................3Table 17 - Acquisition Rates .......................................................................................................................................3Table 18 - Low-Speed Data Encode Filter Response ..................................................................................................3Table 19 -Minimum Operating System Requirements ................................................................................................3Table 20 - Cable Connections......................................................................................................................................3Table 21 - Current (I) Limits .......................................................................................................................................3Table 23 - SIMON Commands....................................................................................................................................3Table 24 - I/O Signal Paths..........................................................................................................................................3Table 25 - FactoryTest Manual Mode Commands ......................................................................................................3Table 26 - I/O Output Group A Paths..........................................................................................................................3Table 27 - FactoryTest Manual Mode Commands (Group B).....................................................................................3Table 28 - I/O Outputs Group B Paths.........................................................................................................................3Table 29 - FactoryTest Manual Mode Commands (Group C)..................................................................................... 3Table 30 - I/O Outputs Group C Paths......................................................................................................................... 3Table 31 - FactoryTest Command Mode READ Commands ...................................................................................... 3Table 32 - Group A I/O Input Paths.............................................................................................................................3Table 33 - READ Commands and Expected Results................................................................................................... 3Table 34 - I/O Input Group B Paths.............................................................................................................................3Table 35 - Test Point Levels........................................................................................................................................3Table 36 - Frequency Response at LSDTX .................................................................................................................3Table 37 - Circuit Levels .............................................................................................................................................3Table 38 - High Speed Data Signal Levels..................................................................................................................3

SPECIFICATIONSMM101271V1 R2A 71.0 SPECIFICATIONS1INPUT VOLTAGE +13.8±20% VDCCURRENT DRAINWithout 9600 baud modem 900mA (typical), 1.5 Amps (maximum)With 9600 baud modem 1.5 Amps (typical), 2 Amps (maximum)OPERATING TEMPERATURE -22°F to +140°F (-30°C to +60°C)DIMENSIONS (H x W x D) 1.75 x 17.12 x 15.625 inches(4.44 x 43.48 x 39.69 cm)DATA TRANSMISSIONHigh Speed (RF and phone line) 9600 ±1bps (EDACS Wideband)Low Speed 150 ±1bpsCOMMUNICATION INTERFACERedundant Communication LinkData Levels 0 to 13.8 VDC (nominal)Data Format 1 start bit, 1 stop bit, and 8/9 data bitsData Rate 38.4 kbaudEthernet Interfaces 10 Mbit 1 These specifications are intended to be used by the service technician during servicing. Refer to the appropriateSpecification Sheet for the complete Specification.

RELATED PUBLICATIONS8MM101271V1 R2A2.0 RELATED PUBLICATIONSPublication TitleLBI-39152 Rockwell Modem Interface Card ROA 117 2247/1Rockwell Modem Assembly, RYTUA 921 01/1RS-232 INTERFACE CARD, ROA 117 2247/2MM101343V1 SitePro Controller Installation and Configuration ManualMM101461V1 SitePro Personality Programming Manual

SAFETY SYMBOLSMM101271V1 R2A 93.0 SAFETY SYMBOLS AND INFORMATIONWARNINGThe WARNING symbol calls attention to a procedure, practice, or the like,which, if not correctly performed or adhered to, could result in personalinjury. Do not proceed beyond a WARNING symbol until the conditionsidentified are fully understood or met.CAUTIONThe CAUTION symbol calls attention to an operating procedure, practice, orthe like, which, if not performed correctly or adhered to, could result indamage to the equipment or severely degrade the equipment performance.NOTEThe NOTE symbol calls attention to supplemental information, which mayimprove system performance or clarify a process or procedure.The ESD symbol calls attention to procedures, practices, or the like, whichcould expose equipment to the effects of Electro-Static Discharge. Properprecautions must be taken to prevent ESD when handling circuit modules.• The means of disconnecting power from a station cabinet is the cabinet power supplyplug.• When conducting repair/maintenance, disconnect the cabinet power supply plug fromthe AC source.• In European applications, equipment must be installed in a closed cabinet.• Only replace components with components specified by M/A-COM Private RadioSystems.

INTRODUCTION10 MM101271V1 R2A4.0 INTRODUCTIONThe SitePro Controller was developed by M/A-COM Private Radio Systems as the nextgeneration trunking controller. This GETC replacement increases site reliability andsecurity, and enables new site features.4.1 OverviewSitePro Controller EA101209V1 is the distributed control equipment used at the basestation of an EDACS® or ProVoiceTM communication system. The SitePro Controllerinterprets and directs inbound calls, processes these calls, and issues appropriatecommands about how calls are handled. The SitePro Controller is the heart of an EDACSor ProVoice critical communications system (Figure 1 - SitePro/Site Interface Module(SIM) Controller).SiteProEDACSChannelSiteProEDACSChannelSiteProEDACSChannelSiteProEDACSChannelBSL BSL BSLRF Equipment (Combiner/Multicoupler)Up to 24Channels~V.TOptional CommunicationsSystem DirectorEthernet HubSite InterfaceModuleBSLFigure 1 - SitePro/Site Interface Module (SIM) Controller

INTRODUCTIONMM101271V1 R2A 114.2 Operational FeaturesThe CSD allows access to the user and site database utilized by the SitePro Controller.The SitePro Controller offers the following features:1. Eight Priority Levels – The SitePro Controller prioritizes calls from a list ofindividual and group identification numbers (LIDs and GIDs) for use during queuing.This prioritized list ensures that higher priority calls are processed first for criticalcommunications.2. Call Validation – The SitePro Controller checks the ID of every radio attempting toaccess the system. An invalid ID attempting to use the system will be denied access,eliminating system security breeches.3. Unit Enable/Disable – The SitePro Controller has the capability to disable andenable radios over the air. This feature prevents intruders from accessing the systemwith stolen or misplaced radios.4. Dynamic Regroup – This feature allows the SitePro Controller to reconfigure radio-operating groups in response to critical emergency situations.5. Recent Priority Increments – The SitePro Controller is able to increase the prioritylevel of ID’s that have recently placed calls. This allows ongoing conversations tohave a higher priority.6. Local Telephone Interconnect – The SitePro Controller supports local telephoneinterconnect. Calls can be made to and from an individual or to a group in an EDACSor ProVoice system.7. Multiple Channel Partition (MCP) – Using MCP, the SitePro Controller is capableof segregating sets of channels for exclusive use by select users. Up to 15 distinctpartitions may be defined to ensure channel availability for critical communications.8. Toll Call Restriction - The SitePro Controller is able to restrict Hotline telephoneaccess by radio for both local and long distance calls.9. Patch and Simulselect - The SitePro Controller allows console dispatchers to"patch" together different talkgroups. This feature allows maximum response toemergency situations.10. Site Configuration - The SitePro Controller is the repository for critical siteconfiguration data resident on the Communications Systems Director (CSD).11. Redundant Downlink GETCTM (Optional) - A Downlink GETC shelf provides the9600-baud Integrated Multisite and Console Controller (IMC) link forcommunications control from the repeater site to the dispatch center site or multisiteswitch.4.3 Options and AccessoriesSite Sentry Alarm and Control System – The Site Sentry alarm and control equipmentenables the SitePro Controller to monitor key aspects of the site operation, including thefollowing:1. Remote reporting of inputs from customer-specific alarm sensors.2. Remote control of relays that operate customer-specific devices.

INTRODUCTION12 MM101271V1 R2A3. Diagnostic testing of system operation.4. Local display of system statusThe Site Sentry also keeps track of transmitter performance and the antenna system. Theparameters monitored to verify the system health are transmitter power, forward andreflected antenna power, and antenna Voltage Standing Wave Ratio (VSWR).Site SureCall Test Call System – Site SureCall allows remote channel monitoring andtesting of repeater stations via a Test Unit (TU) radio.Hotline Local Telephone Interconnect – The SitePro Controller provides the processingfor Hotline. Calls can be made from the Public Switched Telephone Network (PSTN) toan individual or group as well as from a radio to the PSTN.4.4 SUMMARYThe SitePro Controller provides the latest control technology to ensure that the EDACSor ProVoice critical communication system is unmatched in system performance. TheSitePro Controllers are capable of maintaining the following critical communicationfeatures even if the SIM, due to a temporary failure, is taken out or service:1. Eight Priority Levels2. Call Validation3. Recent Priority Increment4. Multiple Channel Partition5. Patch and Simulselect

MAINTENANCE AND SERVICEMM101271V1 R2A 135.0 MAINTENANCE AND SERVICEThis manual provides maintenance and servicing information for M/A-COM SiteProController Shelf Assembly EA101209V12. Production versions of this shelf consist of thefollowing components:• Shelf Assembly MA101080V1• Interconnect Board Assembly (A1) CB101073V1• Controller Board Assembly (A2) CD101069V1• SitePro Modem Board (A2-A1) CB101074V1• Rockwell Modem InterfaceCard Assembly (A3) ROA 117 2247Rockwell Modem Assembly (A7) RYTUZ 921 01/1• Analog Board (A4) CB101070V1• Power Supply Module (A5) PS-PS101328V1• Display Module (A6) MA101082V1Display Board Assembly (A6-A1) CB101077V1Cable (A6-W1) CA101222V1• Input Cable to the Power Supply (W1) CA101211V1• Output Cable from the Power Supply (W2) CA101212V15.1 APPLICATIONSThe SitePro Controller can be installed and configured for several different stationapplications. Initially the basic configuration is for the EDACS Station Trunking Shelf.This shelf enables the station to function as part of an EDACS trunked communicationsystem by providing digital signaling and control of the associated base station. Inaddition, the SitePro Controller provides an interface between the base station repeater,the Site Interface Module (SIM) and other channel SitePro Controller(s) at the sametime.5.2 COMPATIBILITY AND MIGRATIONThe SitePro Controller, with the exception of the Site Controller, is compatible withGETC compatible devices as follows:• Downlink GETC• SIM• SureCall• Hotline• Site Sentry 2 The Service Technician(s) should always consult any application manuals, Software Release Notes (SRN), and SpecificCustomer information provided with the system whenever the equipment requires service or repair.

MAINTENANCE AND SERVICE14 MM101271V1 R2AThe requirements for compatibility and migration are that:1. The SitePro Controller will only switch modes if the Control Channel fails or aconfiguration command is received. The SitePro Controller will, however, changemodes as currently implemented by the GETC. For example, the SitePro ControllerControl Channel can switch modes, without failure or configuration command, if itdetects carrier.2. For High Speed Data Modulation, the SitePro Controller has a separate Analog Board(A4) providing software configurable filtering, which is compatible with high-speeddata types.5.3 SYSTEM EXTERNAL INTERFACES(SitePro Trunked Interface Specification)The following is a description of all electrical connections to the SitePro Controller. Allinput/output definitions are relative to the SitePro Controller. This configuration supportsEDACS, Simulcast and Voted systems. The analog and digital control signals provide aninterface to a variety of base stations and are grouped by functionality.5.3.1 Station Control• LocRxAudio - Analog inputMASTR III level = 1 Vrms, Zin = 100Kohm, bias = ac coupledThis signal is unfiltered local receiver audio from the base station also calledVolume/Squelch or VolSqHi and carries either High Speed Data (controlsignaling/digital audio) or Low Speed Data with analog audio. The two componentsare internally separated.• RUS - Digital TTL active high inputThis signal is the Receiver UnSquelch signal from the base station and is activatedwhen a carrier of sufficient signal strength (as determined by the squelch pot setting)is present.• LSD - Analog outputlevel = 300 mVrmsZout = 100ohm, bias = 0 voltsThis signal is the Low Speed Data output to the base station. The signal isconditioned through a low pass filter to remove frequency components above 300 Hzto allow multiplexing with analog voice audio.• HSD - Analog outputlevel = 1.1 VrmsZout = 100ohm, bias = 0 voltsThis signal is the High Speed Data output to the base station modulator. The signal isconditioned through a specially designed filter needed to meet precise RF modulationbandwidth limitations.

MAINTENANCE AND SERVICEMM101271V1 R2A 15• LocPTT - Digital active low open drain outputThis signal is the Local PTT control. This line, when low, will key up the base stationtransmitter and select the local receiver audio source for transmission.• RemPTT - Digital active low open drain outputThis signal is the Remote PTT control. This line, when low, will key up the basestation transmitter and select the remote audio source for transmission.• A/DmodCtrl - Digital output TTLThis is the Analog/Digital Modulation Control signal. When high, HSD is routed tothe base station transmit. When low, LSD/audio is routed to the base station transmit.• HSAcq - Digital output open drain outputThis is the High-Speed Acquisition control signal. A high or low signal produces acorresponding high or low time constant in the limiter circuit.• LocRxMute - Digital active low output (8.5 volt low Z source)This signal is the Local Receiver Mute control. This line, when low, blocks therouting of receiver audio to the base station transmitter and line out. Muting occursduring HSD transmission, no valid carrier present, or no valid LSD present.• Walsh1/Walsh2 - Digital output TTLThese two signals are combined to form a two bit Walsh Function DAC. This signalis the Low Speed Data source.• Synth_Clk – Digital open drain outputThis signal provides the clock source for loading the base station frequencysynthesizer (required for MIIe). Data is clocked on the negative edge of the clock.The baud rate is approximately 2.4Kbaud.• Synth_Data – Digital open drain outputThis signal provides the data source for loading the base station frequencysynthesizer (required for MIIe). Data is clocked on the negative edge of the clock.The baud rate is approximately 2.4Kbaud.• Synth_LdEn – Digital open drain outputThis signal is the Synthesizer Load Enable control. This line, when high, permits thebase station frequency synthesizer to be loaded and is used for protection againstinvalid transitions on the clock and data lines.• Synth_Locked – Digital TTL active high inputThis is the Synthesizer Locked signal. This line, when high, indicates that the basestation synthesizer is locked. This is used for verifying successful synthesizer loadingand is also continuously monitored as a failure mode.• PAFail - Digital TTL active high input diode isolated with pull-upThis is the Power Amp Failure indicator. This line, when high, indicates that the basestation PA has failed. A floating line asserts PA Fail.

MAINTENANCE AND SERVICE16 MM101271V1 R2A• RemAudioFlag - Digital TTL active low input, diode isolatedThis is the Remote Audio Present indicator. This line, when low, indicates thatremote audio from the IMC is present. This is generated by the base station inresponse to 2175Hz or E&M from the IMC.• FSL - Digital open drain bi-directionaloutput: 300-mA sink (low), 10mA source (high)input: Zin = 1k ohmThis is the bi-directional Frame Sync Line. The line is used as an output in theControl Channel and as an input in the Working Channel.• ADCin – Analog inputlevel = 0 to 5 volts, Zin = 100KohmThis is the 8-bit Analog to Digital Converter (ADC) input. This may be used tomonitor station PA power.5.3.2 Simulcast Control• ext_PTT - Digital TTL active low input, diode isolatedThis is the external source for Local PTT and is only active in a Simulcastconfiguration.• ext_A/Dmodctrl - Digital TTL active low input, diode isolatedThis is the external source for the Analog/Digital modulation control and is onlyactive in a Simulcast configuration.• ext_150 - RS422 inputThis is the external source for Low Speed Data and is only active in a Simulcastconfiguration.• ext_9600baud - RS422 inputThis is the external source for High Speed Data and is only active in a Simulcastconfiguration.• bypass - Digital TTL active low input, diode isolatedThis is the Simulcast bypass control signal. This line, when low, forces the site tooperate in non-Simulcast mode and is driven by the Simulcast control equipment.• inhibit - Digital TTL active low input, diode isolatedThis signal is the Simulcast alarm indicator. This line, when low, indicates thepresence of a Simulcast alarm and is driven by the Simulcast control equipment.• txclk_in - Digital TTL active low input, diode isolatedThis is the external source for High Speed Clock and is only active in a Simulcastconfiguration.• txclk_alarm - Digital TTL active high outputThis signal is the Simulcast Tx Clock alarm indicator. This line, when high, indicates

MAINTENANCE AND SERVICEMM101271V1 R2A 17that the external source for High Speed Clock is missing and is only active in aSimulcast configuration.• 9.6 REF - External source of systems clock (RS422 input). Only active withSimulcast5.3.3 Conventional Control• CPTT – Digital open drain outputThis signal is the Combined PTT control. This line, when low, will key up the basestation transmitter.• TxCGDis – Digital open drain outputThis signal is the Transmit Channel Guard Disable control. This line, when low,prevents the transmission of Channel.• CGMon - Digital TTL active low input, diode isolatedThis signal is the Channel Guard Monitor control.5.3.4 Voter Control• vot_emsq - Digital open collector outputThis is the Voter E&M Squelch signal. This line, when pulled up to +12V through a4.7k ohm pull-up resistor, indicates the presence of E&M from the Voter. Openoutput indicates no E&M.• vot_rcvng - Digital active low inputThis is the Voter Receiving signal. This line, when low, indicates that the Voter isreceiving.5.3.5 Asynchronous Serial PortsThe following asynchronous serial ports provide control links to the SitePro Controller.Table 1 –Asynchronous Serial PortsPORT FORMAT FUNCTIONENet0 Ethernet 10baseT ManagementENet1(SCC1)Ethernet 10baseT SpareSCC2 RS232 SpareSCC3 RS232 SpareSCC4 RS485 SpareQUART A 38400 baud BSL0QUART B 38400 baud BSL1QUART C RS232 SpareQUART D RS232 Spare

MAINTENANCE AND SERVICE18 MM101271V1 R2APORT FORMAT FUNCTIONSMC1 RS232 (38400 baud (8N1)) Program/DebugSMC2 RS232 Spare80C323 SP0 RS232 (38400 baud (8N1)) Debug80C323 SP1 RS232 (38400 baud (8N1)) Spare5.3.6 Synchronous Serial PortsThe following synchronous serial ports provide data and control paths from the SiteProController to the base station (High Speed Data), to the IMC (Phone Line), and tooptional Voter equipment (VDI).Table 2 - Synchronous Serial PortsPORT FORMAT FUNCTION SIGNALSSSP0 4800/9600 baud Local (RF)Comm LinkTxData, TxClockRxData, RxClockSSP1 9600 baud Remote (PL)Comm LinkTxData, TxClockRxData, RxClockCTS, RTSSSP2 9600 baud Voter (VDI)Comm LinkTxData, TxClockRxData, RxClockCTS, RTS5.3.7 Power• +13.8V - power supply input+13.8 volts, 1.5 amps (nominal)This signal is the positive voltage supply for the SitePro Controller and should beexternally fused. An internal switching DC-DC converter will be used to supply +/-12 and +5volts to the SitePro Controller sub-components.• GND – power supply inputThis signal is the ground connection for the SitePro Controller.

DESCRIPTIONMM101271V1 R2A 196.0 DESCRIPTIONThe SitePro Controller is essentially a processor with audio filtering and specialized I/Ocapability. Flexibility in design allows the SitePro Controller to be configured to functionin many applications as suggested in the APPLICATIONS section. The SiteProController software is stored in flash memory. Configuration Data is stored inNOnVolatile Random Access Memory (NOVRAM).The Controller Board, Rockwell Modem, Analog Board, Power Supply, Display Module,and Display Board are mounted on a tray and enclosed in shelf (Figure 2 - SiteProController Shelf Assembly). The SitePro Controller shelf is a one-rack unit assembly(1.75-inches x 19-inches), which mounts in a standard 19-inch wide equipmentcabinet/rack. This shelf does not slide out, but by reversing the mounting ears can bemounted approximately 2/3 of the way out of the cabinet for troubleshooting.Controller Board A2 uses Dual High Speed Diodes BAV99’s for surge protection on allTTL inputs. However, maximum surge protection is achieved when the SiteProController is grounded to the cabinet earth-ground using Lightning Protection CircuitryGround Kit 344A4500 and the Cabinet Grounding strap Kit 344A4730. Specific detailsfor installing these grounding kits are found in the LIGHTNING PROTECTIONsection 10.0 of this manual.6.1 INDICATORS AND CONTROLSThis section describes the indicators and controls visible and accessible from the frontpanel of the SitePro Controller Shelf Assembly.There are two hinged doors on the front panel of the shelf assembly. Each door has awindow so that indicators mounted on Control Board A2 and Rockwell Modem InterfaceCard A3 can be seen. Opening the Controller Board door provides access to ResetPushbutton switch S1. This door also provides access to PROGRAMMING andDIAGNOSTIC SERIAL PORT J8. Programming is available through this port.The circuit boards can be removed from the shelf assembly through these doors.6.1.1 Indicators6.1.1.1 Controller Board Power IndicatorGreen LED indicator D12 provided on the Controller Board indicates when power isapplied to the shelf. This indicator is visible by looking diagonally through the window inthe hinged door on the front panel of the shelf.6.1.1.2 Controller Board Status IndicatorsFour Red LED status indicators L1 thru L4 (D1 thru D4) are visible through the windowin the hinged door. These indicators show the state of operation of the SitePro Controller.The interpretation of these indicators depend on the system application (refer to theSitePro Controller configuration manual for the specific application).

DESCRIPTION20 MM101271V1 R2AGreen ETHERNET indicators ETH0 and ETH1 are also visible through the window inthe hinged door. These indicators indicate when a compatible source is connected toETHERNET 1 or ETHERNET 2 ports.There are six other LED indicators on the Controller Board that are not visible from thefront panel. Yellow LEDs D7 and D10 indicate when there is transmit activity on ETH0and ETH1. Yellow LEDs D6 and D9 indicate when there is receive activity on ETH0and ETH1. Green LEDs D5 and D8 indicate when there is link activity (refer to EthernetPorts, section 7.3.7).6.1.1.3 Rockwell Modem Interface Card IndicatorsThere are five Red LED indicators on Rockwell Modem Interface Card A3. These LEDsare visible through the window in the hinged door and indicate +5V, +12V, -12V, RLSDand CTS respectively. Received Line Signal Detect (RLSD) indicates data is beingreceived. Clear-To-Send (CTS) indicates a control signal is being sent to the CPUselector.6.1.1.4 DisplayEight-character LED Display Board A6-A1 mounts between the two hinged doors on thefront panel of the SitePro Controller Shelf Assembly. Green LED D1 indicates POWERON to the shelf. This display displays Channel Status and Channel Information.6.1.2 ControlsReset Pushbutton Switch S1 is the only control available on the front panel of theSitePro Controller Shelf Assembly. It is used to reboot the SitePro Controller.6.2 ROCKWELL MODEMThe 9600 Baud Rockwell Modem Board RYTUZ 921 01/1 mounts on top of ModemInterface Card A3 (ROA 117 2247). This Modem Board is used to generate a 9600 baud,fast-train, synchronous, serial data stream suitable for transmission over audio (phone)line or microwave link. The data stream is sent over a full-duplex, four-wire, dedicated3002 grade telephone line.Receive and Transmit Phone Data Lines are two balanced pairs carrying Modem data toand from the station where the data is combined with station audio (voice) and routed tothe Remote Line input and Line output.In addition to transformer isolation and conditioning provided by the SitePro Controller,the modem provides automatic adaptive signal equalization. The Rockwell Modemdemodulates the input signal and the resulting data is transferred using a serial interfacebetween the Rockwell Modem and the controller.The modem senses a received signal by initiating a training state upon detecting anincrease in the input signal level. The modem begins processing data at the end of thetraining state if the input signal is still above the nominal -40 dBm receiving thresholdvalue. Otherwise, the modem returns to an idle mode at the end of the training state if theinput signal is below the nominal receiving threshold value.

DESCRIPTIONMM101271V1 R2A 216.3 LOW SPEED AND HIGH SPEED DATA FILTERS6.3.1 Low Speed Data Decode FilterThe Low Speed Data (LSD) Decode Filter, part of Analog Board A4, provides additionalfiltering to remove voice-audio from the receiver unfiltered audio (vol/sq/hi), thus leavingonly the low-speed subaudible data for input to the microprocessor.6.3.2 High Speed Data Encode FilterThe High Speed Data (HSD) Encode Filter, part of Analog Board A4, is configurablebased on personality data and shapes the data for the most efficient RF transmission. Thisdata can be control signaling or digital voice. The data is generated by the RF modemunder control of the 80C323 microprocessor.6.4 INTERFACE CONNECTIONSTable 3 - Interface ConnectionsCONNECTOR INTERFACE CONNECTIONSJ1 96 Pin connector interfaces with Controller Board CB101069V1.J2 96 Pin connector interfaces with Analog Board CB101070V1.J3 96 Pin connector interfaces with Rockwell Modem Interface CardROA 117 2247.J4 2 over 2 BSL/RM (Rockwell Modem). This connector consist offour RJ11 connectors as follows:RM 0 BSL 1QUART ARM 1 BSL 0QUART BJ5 Ethernet 0J6 Ethernet 1J7 4 Pin Power connector (+13.8 VDC).J8 (Controller) Programming connector on the front of Controller Board A2J8 (Interconnect) Connects +13.8 VDC from Interconnect Board A1 to power supplymodule A5 input through cable W1J9 Power Supply Output +12V, -12V and +5V. Cable W2 connectsbetween J9 and J2 on Power Supply Module A5J10 Connects through cable A6-W1 to Display Module A6.J11 20 Pin connector for interfacing with a Conventional/DSP system.J12 24 Pin connector for connecting to an Enhanced Digital AccessCommunication System (EDACS)J13 26 Pin connector for interfacing with a Simulcast System.

DESCRIPTION22 MM101271V1 R2ACONNECTOR INTERFACE CONNECTIONSJ14 6 over 6 phone lines and serial ports. This connector consists oftwelve RJ11 connectors as follows:RM 0 QUART C SCC4RS 485SCC3 80C323PORT 0N/URM 1 QUART D SCC2 SMC2 80C323PORT 1N/U6.5 COMMUNICATION LINKSCommunication Modes available to the SitePro Controller are:1. The SitePro Controller can communicate with other devices such as theCommunication System Director (CSD), IMC, and RF Station. Communicationoccurs primarily through an RS-232C serial interface normally operating at 38.4kilobaud. For a SitePro Controller interfacing with a Site Interface Module (SIM)this is set to 38.4 kilobaud.2. The SitePro Controller can communicate with other SitePro Controllers in the normalmode of operation, over a Backup Serial Link (BSL). The link uses 0-13.8 VDClevels and operates at 38.4 kilobaud and is ordinarily used in a bus configuration. Fora SitePro Controller interfacing with a SIM this is set to 38.4 kilobaud.3. A timing signal called the Frame Sync Line (FSL) helps arbitrate the use of the BSLserial bus. The FSL is also used for timing purposes. In the station configuration, FSLsignals use 0-13 VDC levels to produce a periodic negative going pulse (2.5 ms wideevery 30 ms).4. A 9600/4800 baud full duplex, synchronous communication interface over an RFchannel.5. A 9600 baud phone line or microwave communication interface (this may be RS-232or modem data) through a Rockwell Modem.NOTESitePro Controller interface functions vary from application to application and betweenEDACS systems using MASTR III repeaters. It is necessary to refer to the ApplicationConfiguration Manual for details regarding the specific hardware and softwareconfiguration of the SitePro Controller.

DESCRIPTIONMM101271V1 R2A 23Left Rear20-Pin SIMULCAST ConnectorCenter Rear24-Pin EDACS, 4-Pin POWER & 20-Pin CONV/DSP ConnectorsRight RearEthernet, SERIAL PORT &BSL/RM ConnectorsRear ViewsTop ViewFront ViewFigure 2 - SitePro Controller Shelf AssemblyDC/DC Power Supply (A5)SitePro Modem Board (A2-A1)InterconnectBoard (A1)RockwellModemInterfaceCard (A3)RockwellModemControllerBoard (A2)AnalogBoard (A4)

CIRCUIT ANALYSIS24 MM101271V1 R2A7.0 CIRCUIT ANALYSISThe Theory of operation of each circuit board/card and module used in SitePro ControllerShelf Assembly EA101209V1 is described in the following paragraphs. Refer to theBlock Diagram in Figures 3 and 4 and Outline and Schematic Diagrams as listed in theTABLE OF CONTENTS.The SitePro Controller is a Base Station Controller with redundant communication links[Backup Serial Links (BSL’s)]. The BSL’s provide for inter-channel communication.Two 10Mbit Ethernet Ports provide system level communication. The BSL’s providetrunking communications as well as site configuration and database messaging. OneEthernet port is dedicated to Management System information. The second Ethernet Portis not supported at this time.The SitePro Controller and System Interface Module (SIM) will use the primary BSL fortrunking information and limited management system information. The secondary linkwill ensure continued trunking operation in the event of a primary BSL failure.The SitePro Controller/base station interface for digital information, both receive andtransmit, is 9.6k baud synchronous data. Additional digital control information isprovided via discrete I/O at both the base station and controller. The following diagram(Figure 2) is a high level picture of the SitePro Controller and external interfaces.7.1 SHELF ASSEMBLYSitePro Controller shelf Assembly EA101209V1 is a 19” Rack Mount, one Rack Unitdevice. It is enclosed to reduce emissions and interference with other devices. Serialports, Ethernet, power, and I/O connections are accessible at the back of the shelf (Figure1). The serial port connections (6 OVER 6 PHONE LINES & SERIAL PORTS) arestacked two high using RJ45 type connectors (J14) and RJ11 type connectors (J4). TheEthernet connectors J5 & J6 (ETHERNET 0 & ETHERNET 1) are single height RJ45connectors. The power connector (J7) and I/O connectors (J11, J12 & J13) are Molextype.The front panel has two hinged access doors for insertion/removal of the ControllerBoard and the Rockwell Modem card for troubleshooting and ease of maintenance. Thesedoors have RF fingers to reduce emissions. Diagnostic LEDs and the eight-characterdisplay are viewable from the front panel.The Shelf Assembly consists of Interconnect Board A1, which provides connectors toaccommodate:• Controller Board CB101069V1 (A2)• Rockwell Modem Interface Card Assembly ROA 117 2247 (A3)• Analog Board CB101070V1 (A4)• Power Supply PS101328V1 (A5)• Display Module MA101082V1 (A6)

CIRCUIT ANALYSISMM101271V1 R2A 25Loc PTTRem PTTA/D ModCtrlHSDLSDPA FailLocal Rx AudioLocal Tx AudioRUSRem Audio FlagLocal Rx MuteSynth_LockedSynth_ClkSynth_DataSynth_LdEnADCinbypassinhibitext_PTText_ADModCTrlext_150ext_HSDTxClk_inTxClk_alarmE0E1SCC1SCC2SCC3SMC1BSL/FSL0BSL/FSL1Com3Com4SP0SP1ControllerAnalogPower Supply(switch mode)SSP0SSP1SSP2External (simulcast)Signals and ControlConventionalSignals and ControlLocal (station)Signals and ControlVoterSignals and ControlLocal (RF) HSDSitePro InterfaceFILTERSLINE DRIVERSANALOG SWITCHESADCMPC860DS80C323QUARTUSRTPLD+5v @2a+/- 12vEtherNet PortsAsynchronousSerial PortsRMICROCKWELL MODEMLINE DRIVERSANALOG SWITCHESVoted (VDI) HSDRemote (PL) HSDCPTTTxCGDisCGMonVot_emsqVot_rcvngFigure 3 - SitePro Shelf Assembly Block Diagram

CIRCUIT ANALYSIS26 MM101271V1 R2A7.2 INTERCONNECT BOARD (A1)Interconnect Board CB101073V1 is a passive printed circuit board that providesinterconnections between all internal components of the SitePro Controller shelf andinterfaces the SitePro Controller shelf with the outside world (Refer to Table 3 -Interface Connections, and Interconnection, Outline and Schematic Diagrams). Pifilters U1 thru U29 reduce any Electro Mechanical Interference (EMI).7.3 CONTROLLER BOARD (A2)Controller Board CB101069V1 contains all SitePro Controller logic and control functionsexcept the power supply and Rockwell Modem (Refer to the Outline and SchematicDiagrams for the Controller Board as listed in the TABLE OF CONTENTS).This Controller Board is based on an MPC860 microprocessor, the primary responsibilitybeing message processing. This board has multiple high-speed serial ports, two of, whichare used for primary and secondary BSL’s. It has hardware and dual port RAM to supportthe SitePro Modem Board and a 10/100 Mbit ethernet port. This port is available forVoice Over IP traffic. A second 10 Mbit ethernet port is available for managementfunctions.This board has sufficient memory to support 1M LIDs and 64k GIDs. It has LID and GIDvalidation for all calls.7.3.1 Block DiagramFigure 4 - Controller Board Block Diagram shows the connection of major componentsfrom a high level viewpoint. Schematic Diagram WD-CB101069V1, Sheet 2 alsoprovides a Block Diagram for the Controller Board. These diagrams show the majorcomponents of this board as:• CPU (MPC860P)• Ethernet 10 Base T• Ethernet 10/100 Base T• EEPROM• Modem Board• Memory:⇒ FLASH⇒ DRAM• Electronically Programmable LogicDevice (EPLD)• Quad UART (QUART)• LEDS• DIPSWITCH• I2C Real-Time-Clock (RTC)• Serial Ports• Regulator• Hot Swap Controller (HSC)• Interconnect Board (Backplane)7.3.2 System I/OThe System I/O circuits for the Controller Board are shown on Schematic Diagram WD-CB101069V1, Sheet 3 and include:• Oscillator For PHYs • 3.3V Power Monitor• JTAG Port • Test Points• Board Insert Detection Circuit • Programming Serial Port J8• Hot Swap Controller • Decouplers• 3.3V Regulator

CIRCUIT ANALYSISMM101271V1 R2A 27MPC860P59 MHzMIIEnet PHY10/100 BaseT1:1 1:1SDRAM8M x 32FLASH1M x 32I2CEEPROM32K x 832.768kHzRTC29.4912MHzSMC1SMC2SCC4BDMQUARTRS-232RS-232EPLD RS-232I/O Backplane1234RS-232RS-232SitePro Modem BoardOUTsINs3232328 JTAGINTsDATAREG5V3.3VPLJTAGJTAGI/O +12VEnet PHY10 BaseT1:1 1:1SCC1LEDsVDIRFRS-232RS-232DIP SWRS-232SCC2RS-232SCC3I/OSerialNumberRS-485BSLBSL XCVRJTAG5VHSCJTAGI2C RTC3.0VBatt32.768kHzDIAGNOSITCPORTFigure 4 - Controller Board Block Diagram

CIRCUIT ANALYSIS28 MM101271V1 R2A7.3.2.1 Oscillator For Ethernet PHYsThis circuit consists of crystal oscillator circuit Y1 powered by 3.3 V applied to Y1, Pin4, Vcc. Oscillator circuit Y1 is biased on by resistor R49 connected to Y1, Pin 3, CTRLand produces 25 MHz on the output at Pin 3 through resistor R51 (OSC 25MHz). Thisoutput connects to the CLK25 inputs to the Ethernet 10 and Ethernet 10/100 MbitPHYs3.7.3.2.2 JTAG PortThis JTAG PORT circuit consists of buffer U1 (NC7SZ125M5). This circuit allowsprogramming directly to the microprocessor through connector J4. This circuitry is notpresently used.7.3.2.3 Board Insert Detection CircuitThis circuit consists of NPN transistors Q6 and Q7. When the Controller Board isinserted into a live Interconnect Board, the base circuits of these transistors are connectedto ground through connector J1B, Pins B1 and B32 at either end of J2. Connector J1B,Pin B1 is MATE-DETECT-A and J1B, Pin B32 is MATE-DETECT-B. With the base ofboth transistors at ground, they are held in the off state. This allows POWER ON to cyclehigh if the output of U41 is high. The POWER ON voltage is applied to Pin 2 of HotSwapTM Controller U37. If the base of either transistor (Q6 or Q7) is not connected toground, POWER ON will not be applied to the HotSwap Controller. Therefore, if thecard is not seated properly, power will not turn ON.7.3.2.4 Hot Swap™ ControllerHot Swap™ controller (HSC) U37 allows Controller Board CB101069V1 to be safelyinserted in or removed from Interconnect Board CB101073V1 while voltage is applied.Using external N-channel pass transistor Q5, the supply voltage to the Controller Board isramped up at a controlled rate. Hot Swap switch driver U37, Pin 6 controls the N-channelgate. A programmable electronic circuit breaker detecting over current by sensing voltageacross 15 milliohm resistor R153 protects against shorts. The RESET output (U37, Pin 1)is used to generate a system reset when the supply voltage falls below the voltage presetby resistors R167 and R168. The POWER ON input to U37, Pin 2 is used to cycle theController Board power. The 555 timer circuit (U40) is connected to the HSC chip so thatthe HSC can be automatically reset in the case of a circuit breaker fault.Because the Hot Swap Controller, U37, latches OFF if it senses an overload, a timercircuit has been added to occasionally turn it back ON. If the overload still exists, it turnsoff immediately but if the overload is not present, normal operation is restored. Thiscircuit is needed for unattended operation.The 555 timer is powered any time 5V is applied to the board since it is connected aheadof the Hot Swap Controller. As long as the HSC is ON, 5V is fed to inverter U42-2through D34. The resulting low on U42-4 holds U40 at reset.When the HSC turns power OFF, U42-4 goes high and the reset is removed. The timernow free runs with about a 1.1 second cycle time. U40-3 is high for about 0.7 sec and low 3 PHY is an Industry Standard for “Physical Interface.”

CIRCUIT ANALYSISMM101271V1 R2A 29for about 0.4 sec. U40-3 is inverted by U41. During the high part of the cycle, theresulting low at U41-4 holds the HSC ON pin low keeping the HSC OFF.When U40-3 switches low, U37-2, the HSC ON pin is allowed to go high through D35,pulled up by resistor R157. The HSC turns ON, but if the fault is still present, it turnsOFF within 40µs and the cycle continues. If the fault is gone, the 555 is held reset and theController Board resumes normal functioning.Capacitor C119 and resistor R191 act as a slugging filter on the FB input to prevent fasttransients on the 5V from causing the HSC to generate a reset. Likewise, capacitor C118and resistor R190 prevent large transients on the input 5V, i.e. when the RMIC is hotswapped, from causing the HSC to generate a reset due to a transient on the ON pin.7.3.2.5 3.3V RegulatorThe controller board is provided with 5 Volts and ±12 Volts from the Interconnect Board.Linear regulator U25 is used to provide 3.3 volts to be used by the majority of digitallogic on the Controller Board and the Board.The Hot Swap Controller (HSC) is used to ramp up the 5V-power rail at a controlledrate. This, in addition to other considerations, will allow the Controller Board to be hotswappable. The 5V output from this circuit will also power the 3.3-Volt regulator, thuscausing the 3.3 V power rail to also ramp up at a controlled rate. As mentioned above, theHSC has a built-in electronic circuit breaker.7.3.2.6 3.3V Power MonitorThe 3.3V Power Monitor (U31) uses a precision temperature-compensated reference andcomparator circuit to monitor the status of the 3.3V supply. If a loss of power is detectedan internal power-fail signal forces reset to the active state, which is low. When the 3.3Vsupply returns to a normal state, the reset signal is kept active for approximately 150 msto allow the power supply and microprocessor to stabilize. This 3.3V Power Monitorcircuit also monitors Reset Pushbutton S1 on the reset output, U31, Pin 1. If the reset ispulled low, by pressing S1, a reset signal is generated upon release. The output of U31 isheld in reset output (low) for approximately 150 ms.7.3.2.7 Test PointsTest Points TP1 thru TP10 are provided on the Controller Board as follows:• TP1 thru TP3, TP7, TP8 and TP10 are ground connections• TP4 is +12V• TP5 is +3.3V• TP6 is +5.0V• TP9 is WALSHCLK7.3.2.8 Programming Serial Port J8This port (J8) is located at the front of the Controller Board just behind the hinged door.It is provided so that a programmer can easily program the microprocessor from the frontof the SitePro Controller without removing it from the cabinet.

CIRCUIT ANALYSIS30 MM101271V1 R2A7.3.2.9 DecouplersDecoupling capacitors (Decouplers) are used to eliminate high-speed transient noise inhigh-speed digital circuits. There are many decoupling capacitors used on the ControllerBoard. These capacitors are connected between a source and ground. For example, onsheet 3 of Schematic Diagram WD-CB101069V1 there are two 3.3V decouplingcapacitors, C2 and C87.7.3.3 BackplaneThe Controller Board to Interconnect Board A1 (Backplane) connector circuits are shownon Schematic Diagram WD-CB101069V1, Sheets 4-7 and include:• Board Connections • I/O (1)• Serial I/O • I/O (2)7.3.3.1 Board ConnectionsSchematic Diagram WD-CB101069V1, Sheet 4 shows the single DIN96 connector, J7.This 96-pin connector has three layers of pins, J7A, J7B and J7C. Each layer consists of32 pins. J7B, Pins 1 and 32 are the MATE-DETECT-A and MATE DETECT-Bconnections. These two connections are used with the Board Insertion Detection circuit.Pins J7B; Pins 27 and 28 are the SCL and SDA connections. SCL and SDA make up theI2C bus. CPU I/O SIGNAL PROTECTION DIODES D27, D29 connected to SCL andSDA provide surge protection for the I2C bus.7.3.3.2 Serial I/ONumerous asynchronous and synchronous serial ports are brought to the InterconnectBoard (Backplane) from the microprocessor, Modem Board and QUART. Most serialports convert to standard RS-232 levels using RS-232 transceivers U13, U24, U30 &U36. Serial port U21 converts to RS-485 differential signal levels and supports amultidrop network. One microprocessor RS-232 port is used as a diagnostic or localprogramming port and is brought to RJ-11 connector J8 on the front of the board. Twoports from the QUART use BSL signaling.All Serial ports are designed for full-duplex 115.2 kbaud communications with theexception of the RS-485 port U21 from the microprocessor SCC. This port is a half-duplex HDLC port and supports speeds up to 2 Mbaud.U21 is a differential bus transceiver for bi-directional data communication on multiportbus transmission lines. This device combines a 3-state differential line driver and adifferential input line receiver. The driver and receiver have active-high and active-lowenables that are connected together externally to function as a direction control. Thedriver differential outputs and the receiver differential inputs are connected internally toform differential input/output I/O bus ports. These ports are designed to offer minimumloading to the bus when the driver is disabled or Vcc=0.BSL signaling is accomplished through two identical circuits consisting of hex invertingSchmitt Triggers U23A/U23B, inverter buffer drivers U35A/U35B, Field EffectTransistors (FET) Q3/Q4, NPN transistors Q9/Q10 and diodes D23/D25. Inputs to themicroprocessor from the Interconnect Board (backplane) are through diode D23/D25 tothe input of U23A/U23B. Schmitt Trigger U23A/U23B provides a well-defined output

CIRCUIT ANALYSISMM101271V1 R2A 31for an input to the base of NPN transistor Q9/Q10. Transistors Q9/Q10 are used toconvert the RX level from 5V to 3.3V. The output of Q9/Q10 (RXA/RXB) is applied at3.3V to the microprocessor. When the input (BKP-BSL0/BSL1) is high, diode D23/D25is reversed biased making the input to U23A/U23B high and the output on the collectorof Q9/Q10 also high. When the input is low, diode D23/D25 is forward biased and theinput to U23A/U23B is low. The output on the collector of Q9/Q10 is also low.Outputs from the microprocessor to the backplane are through inverter buffer driverU35A/U35B, and FET Q3/Q4. The output RXA/RXB from the QUART is applied to theinput of inverter circuit U35A/B35B. When this input to U35A/B35B is low, the output ishigh. This causes Q3/Q4 to conduct. Diode D32/D33 is forwarded biased and the outputto BKP-BSL0/BSL1 is low. Diode D32/D33 prevents loading the BSL when power isoff. When the input to U35A/U35B is high Q3/Q4 does not conduct and the output toBKP-BSL0/BSL1 is high. FET Q3/Q4 is powerful enough to drive 1k ohm loads on up to25 parallel connected shelves.7.3.3.3 I/OOther I/O’s are shown on Schematic Diagram WD-CB101069V1, Sheets 6 and 7. Inputsto the EPLD from the backplane consist of identical circuits for different inputs. Thesecircuits consist of inverter buffer driver circuits U18A thru F, Schmitt Triggers U22Bthru D and U23C thru F (Figure 5 - Input Circuits U18A thru F, U22B thru D and U23Cthru F). Identical circuits for different inputs also include inverter buffer driver circuitsU22A, E, F, U29D and U32B (Figure 6 - Input Circuits U22A, E, F, U29D and U32B).Figure 5 shows inputs using 74HC14's with diode coupling. When the input from thebackplane goes low the diode is forwarded biased and the input to the inverter goes low.This results in a sharp, well-defined output of the inverter going high. Outputs are:• REM-AUDIO PRESENT (U18A) • EXTADIN (U22C)• CAS (U18B) • EXT150IN (U22D)• CGMON (U18C) • RCVING-FROM-AV (U23C)• LSDIN (U18D) • SYNTH-LOCK DET (U23D)• PAFAIL (U18E) • SIMULCAST-INHBIT (U23E)• FSLIN (U18F) • BYPASS (U23F)• EXTPTTIN (U22B)EPLDBACKPLANE5.0V 5.0VBAV99Figure 5 - Input Circuits U18A thru F, U22B thru D and U23C thru FIn Figure 6 the Schmitt Trigger provides a sharp, well-defined input to themicroprocessor

CIRCUIT ANALYSIS32 MM101271V1 R2AEPLD BACKPLANE5.0V 5.0VFigure 6 - Input Circuits U22A, E, F, U29D and U32BThe FSL output from the EPLD to the backplane is connected through inverter circuitU33A and FET Q2 (BKP-FSL).The RX-MUTE output from the EPLD to the backplane is connected through InverterU33D and transistor circuit Q1 (BKP-RX_MUTE).The EMSQTOAV output from the EPLD to the backplane is accomplished throughInverter U35C and transistor circuit Q6 (BKP-EMSQTOAV).Other outputs from the EPLD to the backplane are connected through identical circuits asshown in Figures 7 & 8. Figure 7 shows circuits using Schmitt Triggers U29B, C, E, Fand U32A & C to provide sharp, well-defined outputs to the backplane and to provide 5Vlevels (Inputs are generally 3.3V). These outputs are:• BKP-WALSH1 (U29B) • BKP-RFTXDAT (U29F)• BKP-WALSH2 (U29C) • BKP-RFTXCLK (U32A)• BKP-A/DMODCTL (U29E) • BKP-LSDOUT (U32C)EPLD BACKPLANE5.0V0-5V0-3.3VFigure 7 - Output Circuits U29B, C, E & F, U33C, E & F and U34A thru FFigure 8 shows circuits using open collector inverters circuits U33B, C, E, F, U34A, B,C, D, E, F and U35C, D, E & F. These outputs are:

CIRCUIT ANALYSISMM101271V1 R2A 33• BKP-SYNTH_DATA (U33B)• BKP-SYNTH_DATA_CLK (U33C)• BKP-RPTKEY (U33E)• BKP-SPARE2 (U33F)• BKP-CPTTOUT (U34A)• BKP-SPARE1 (U34B)• BKP-STNPTT (U34C)• BKP-RPT_INH (U34D)• BKP-TXCGDIS (U34E)• BKP-HSACO (U34F)• BKP-EMSOTCAV (U35C)• BKP-TXC_MISSING_ALARM(U35D)• BKP-REM_RPT (U35E)• BKP-SYNTH_LD_EN (U35F)EPLD BACKPLANE5.0VFigure 8 - Output Circuits U33B, C, E, F, U34A, B, C, D, E, Fand U35C, D, E & F

CIRCUIT ANALYSIS34 MM101271V1 R2A7.3.4 CPUThe Central Processing Unit (CPU) circuits, for the Controller Board, are shown onSchematic Diagram WD-CB101069V1, Sheets 8 & 9 and include:• Microprocessor • Microprocessor Support7.3.4.1 MicroprocessorMicroprocessor U94 is an MPC860P processor that has four SCC channels, two SMCchannels, plus a 100 Mbit Fast Ethernet Controller. One of the SCC channels is used as asecond ethernet port (10 Mbit) with all other SCC and SMC channels used as serial ports.This microprocessor runs at 59 MHz using a 29.4912 MHz clock input. This frequencywas selected for use by the baud rate generators to produce standard baud rates up to115.2 kbaud without error. The microprocessor external bus runs at half the speed of themicroprocessor (29.5 MHz).The microprocessor provides an internal real-time clock that is used to provide time-of-day information to the application software. The real time clock runs off of a 32.768 kHzcrystal. An external real-time clock is connected to the microprocessor through the 12Cbus. The microprocessor accesses the internal real-time clock much faster than theexternal one. Therefore, whenever the board powers up, the battery-backed external real-time clock is used to set the time of the internal real-time clock. Once the internal real-time clock is set, it will always be used while the board is powered.Four external interrupts are used in this design. The remaining unused three connect tothe EPLD for future use. Connecting them to the EPLD makes later modifications easier.The external interrupt signals are specified in the following table.Table 4 - External Processor Interrupt SignalsDEVICE IRQ(SPARE-EPLD) IRQ (NMI)QUART IRQ1MODEM DB DUAL-PORT RAM IRQ2(SPARE-EPLD) IRQ3ETHERNET 10/100 IRQ4ETHERNET 10 IRQ5(SPARE-EPLD) IRQ6All but one chip select are used in this design. The unused chip select is connected to theEPLD for future use. The microprocessor chip select signals are defined in the followingtable. 4 Microprocessor U9A and U9B are two parts of the same processor. This was done for drawing convenience.

CIRCUIT ANALYSISMM101271V1 R2A 35Table 5 - External Chip Select SignalsDEVICE IRQ MACHINE DATA BUS WIDTHFLASH CS0 GPCM 32 BitSDRAM CS1 UPMA 32 BitQUART REGISTERS CS2 GPCM 8 BitQUART INTERRUPT VECTOR CS3 GPCM 8 BitsEPLD CS4 GPCM 8 BitsMODEM DUAL PORT RAM CS5 UPMB58 BitsMODEM CODE RAM CS6 GPCM 8 Bits(SPARE-EPLD) CS7 N/A N/ANote that there is both a 32-bit data bus and an 8-bit data bus. The 8-bit data bus isconnected to the 32-bit processor data bus via an 8-bit transceiver. The output enable forthe transceiver is controlled by ANDing all 8-bit chip selects together inside the EPLD.7.3.4.2 Microprocessor SupportThe microprocessor support as shown on Schematic Diagram WP-CB101069V1, Sheet 9includes:• BDM Debug Port Connector • Silicon Serial Number• Power-On Reset Configuration • KAPWR Switch• 32 kHz Crystal • 8-Bit Bus Transceiver• VDDSYN Filter • MICTOR Logic Analyzer ConnectorsBDM Debug Port ConnectorFor debug and development, microprocessor U9A provides a dedicated serial port (BDM)for connecting a debugger/emulator. A debugger/emulator connected to this port allows aprogrammer to read/write registers and external peripherals, control program execution,etc. Many debuggers also have built-in capability to program on-board flash through thisport. These serial port pins are brought to 10-pin header J1 using the standard BDMpinout.Power-ON Reset ConfigurationThe Power-On Reset Configuration consists of four octal buffer/drivers U6A, U6B, U8Aand U8B with 3-state outputs. This circuit ensures that at Power-On all circuits are resetto the starting state. Inputs to these circuits are through 10K BUS8 resistor networks RN7and RN10. The outputs tie into bus D[0.31]. Each package is organized as two 4-bit linedrivers with separate output-enable (OE) inputs. These inputs are tied together andconnect to RESET-N. When RESET-N is low, data passes from A inputs to Y outputs.When RESET-N is high, the outputs are in the high-impedance state. This circuit imposes 5 UPMB is only required if the system makes use of the BUSY_N signal coming from the dual port memory. If BUSY_N isnot used, then a GPCM machine can be used for this chip select.

CIRCUIT ANALYSIS36 MM101271V1 R2Apredetermined "start-up" information on the microprocessor data bus during RESET. Themicroprocessor reads the data bus state just before RESET goes inactive (high) and usesthe result for start-up initialization.At power up, the MPC860 samples the data bus and the MODCK bits to obtain theHardware Configuration Word and clock setup parameters respectively. The SiteProhardware configures these as follows:Data bus 0x017A 0000MODCK1, 2 1,0This results in the following configuration:Internal arbitrationInterrupt vector location 0xFFF0 0000Boot Port size is 32 bits.IMMR is at 0xFF00_0000.Debug Pin Configuration is as follows: VFLS[01], VF0, VF1, STS, AT1, AT2, AT0,AT3, OP3.Debug Port Pin Configuration is DSCK, DSD1, DSD0, PTR1, TCK, TD1 and TD0.External Bus speed set to ½ system clock.Pitrtc connected to extclk and div by 4, pitclk = 32.768/4 = 8192 HzSys clk connected to EXTCLK vco factor is 1, sysclk = 29.4912 MHz32 kHz CrystalThis crystal circuit consists of crystal package Y3, resistors R90 and R98, capacitors C49and C63. This circuits connects to microprocessor U9A between pins N1 (EXTAL) andP1 (XTAL) and produces an oscillator frequency of 32.768kHz to drive the real-timeclock.29 MHz ClockThe 29 MHz Clock consists of oscillator circuit Y2 and resistors R82 and R105. Thiscircuit produces the oscillator frequency of 29.4912 MHz and connects to microprocessorU9A at N2 (EXTCLK).VDDSYN FilterThis circuit consists of inductor L1 and capacitors C50 and C57. It filters the 3.3V supplyto the system Phase-Locked-Loop (PLL) circuitry on microprocessor U9A. The PLLmultiplies the EXTCLK by an integer factor to provide a bus clock.Silicon Serial NumberA unique 64-bit electronic Serial Number chip U3 is used to store the board identificationnumber. This chip has a 1-bit serial port, which interfaces to microprocessor U9 throughan I/O port. In addition, four bits of hardware identification are made available to U9through I/O ports. The Hardware ID is changed by selectively populating a bank ofresistors.

CIRCUIT ANALYSISMM101271V1 R2A 37Real Time Clock (RTC)A battery backed up Real Time Clock, U43, is provided to retain the elapsed time evenwith power off. U43 can be read or written via the I2C bus. The slave address for U43 isD0 hex. Accurate timing is maintained by 32.768kHz crystal Y5.Processor U9 has an internal real time clock, however it consumes too much power toallow battery back up. Therefore the real time is read from U43 via the I2C bus at powerup and stored in the processors RTC. This is a fairly slow process. Afterward, theprocessor can quickly determine the time by reading the internal RTC. Timing for theprocessor RTC is provided by 32.768kHz crystal Y3.KAPWRThe Keep-Alive-PoWeR (KAPWR) circuit consists of 0-ohm resistor R196 and is usedfor the "real time" clock on the microprocessor (860). KAPWR is not powered whenpower is off. This circuit applies 3.3V supply to U9B, Pin R1 (KAPWR).8-Bit Bus TransceiverThis circuit consists of 8-Bit Bus Transceiver U19 and resistor network RN15. The 8-BitBus connects to the microprocessor through 8-Bit Bus Transceiver U19. The outputenable OE for the transceiver is controlled by ANDing all 8-bit chip selects togetherinside EPLD U27. This transceiver drives the data bus for all 8-bit devices.MICTOR Logic Analyzer ConnectorsThese connections consist of J3, J5 and J6. These connectors are for softwaredevelopment and are not present in production units.7.3.5 SitePro Modem Board ConnectorThe SitePro Modem Board connector circuits for the Controller Board are shown onSchematic Diagram WD-CB101069V1, Sheet 10 and include:• QUICC Connector (J9) • I/O Connector (J2)7.3.5.1 QUIC Connector (J9)The QUICC (J9) connector contains the microprocessor interface (Refer to the ModemBoard Section).7.3.5.2 I/O Connector (J2)The I/O (J2) connector has miscellaneous I/O to/from the EPLD or Interconnect Board(Refer to the Modem Board Section).7.3.6 Electrically Programmable Logic Device (EPLD)The EPLD circuit for the Controller Board is shown on Schematic Diagram WD-CB101069V1, Sheet 11. Also, refer to the EPLD Drawings listed in the Table ofContents.

CIRCUIT ANALYSIS38 MM101271V1 R2AAccess to various board inputs/outputs is made available through ElectronicallyProgrammable Logic Device (EPLD) U27. The EPLD contains numerous read/writelatches with a simple 8-bit interface to the microprocessor.The EPLD is in-circuit programmable via the JTAG port using an Altera Byte-blastercable. A 10-Pin header J10 is made available for this purpose. The EPLD JTAG port isalso brought to microprocessor I/O pins to allow the microprocessor to load the EPLDconfiguration.The JTAG port is routed to Modem board (A2-A1). This allows a future modem board tobe designed with an Altera EPLD. If that future EPLD modem board is used, resistorR187 (0 ohms) must be removed from the board.In addition to being an interface to the discrete I/O, the EPLD also divides clocks andprovides the output enable logic for the 8-bit data bus transceiver. It also derives the FSLpulse stream from RFTXDAT and RFTXCLK in the Control Channel mode.7.3.7 Ethernet PortsThere are two Ethernet Port circuits for the Controller Board shown on SchematicDiagram WD-CB101069V1, Sheets 12 & 13 as:• 10 Base-T (10 Mbit PHY) • 10/100 Base-T (10/100 Mbit PHY)The 10/100 Mbit port (10/100 Base-T Transceiver U5) uses the Fast Ethernet Controller(FEC) inside the microprocessor and supports full duplex (10/100 Base-T). The 10 Mbitport (10 Base-T Transceiver U12) uses SCC1 and only supports half-duplex (10 Base-T).The ethernet physical layer transceivers are the same for both ports, but the 10/100 Mbitport uses a Media Independent Interface (MII), whereas the 10 Mbit uses a “7-wire”interface. The ethernet transceivers support 10/100 Base-T with full auto-negotiationcapability, while the 10 Mbit port only advertises 10 Mbit capability.The RJ-45 ethernet connectors are actually located on Interconnect Board A1. Theethernet physical layer chips and transformers reside on the Controller Board with theethernet differential RX/TX signals brought to the RJ-45 connectors through theInterconnect Board connector. A single LINK OK status LED is provided for eachethernet port on the front of the Controller Board.The 10Mbit Ethernet port uses the “7-wire” interface to connect the Ethernet physicaltransceiver to the microprocessor SCC1 serial channel. When SCC1 is in Ethernet mode,the SCC pins have different functions (refer to the following table).Table 6 - 10 Mbit Ethernet ConnectionsSCC ETHERNET SIGNAL SCC PIN NAME PHY SIGNALTX TXD1 10TXDTENA RTS1 10TXENTCLK CLKx 10TXCLKCLSN CTS1 10COLRENA CD1 10CRSRX RXD1 10RXDTCLK CLKx 10RXCLK

CIRCUIT ANALYSISMM101271V1 R2A 397.3.8 I2C BusThe I2C-bus is a two-wire serial bus (SCL and SDA) used for microcontroller-basedcontrol. The I2C Bus circuits, for the Controller Board, are shown on Schematic DiagramWD-CB101069V1, Sheet 14. These circuits consist of Personality EEPROM U14 and 8-bit I/O expanders for the I2C bus U15 and U26.EEPROM U14 provides 16k of non-volatile data storage. EEPROM U14 is organized as16kx8 and is accessible via the I2C port of microprocessor U9.Serial EEPROM U14 has a write protect pin. It is active high and has an external pull-up.To write to U14, port PB23 on the microprocessor is defined as an output and driven low.To write protect the EEPROM after writing to it, port PB23 is defined as an input and thepull-up activates the write protect signal.Several peripherals are available to the microprocessor through the I2C Bus. In additionto a 16kbyte EEPROM, there is an 8-bit writable latch for driving 4 LEDs and an 8-bitreadable latch for reading the status of an 8-bit DIP switch. The I2C bus is also brought tothe Interconnect Board for accessing other off-board peripherals (i.e. LED display). I2Cbus addresses are as follows:Table 7 - I2C Bus AddressesDEVICE ADDRESSESLEDs 0x40DIP Switch 0x46EEPROM (Controller Board) 0xA0Digital Pot 0x50ADC/DAC 0x9E16-Bit Expander 0x4CDisplay 0x4AReal-Time Clock 0xD0EEPROM (Analog Board) 0xA67.3.9 MemoryThe Memory circuits, for the Controller Board, are shown on Schematic Diagram WD-CB101069V1, Sheets 15 & 16 and include:• DRAM Circuits U2 & U7 • Flash Circuits U10 & U117.3.9.1 DRAMTwo 128-Mbit, 16 bit wide synchronous DRAM Integrated Circuits U2 and U7 areorganized in a 4M x 32 configuration. These two chips provide a minimum of 16 Mbytesof storage, upgradeable to 64 Mbytes. The following table shows the MPC860P bankaddresses for the different DRAM memory sizes.

CIRCUIT ANALYSIS40 MM101271V1 R2ATable 8 - DRAM Bank Memory RangesBANK 64-MBIT (DRAM) 128-MBIT (2XDRAM) 256-MBIT (SDRAM)Bank 1 0x003FFFFF – 0x00000000 0x003FFFFF – 0x000000000x013FFFFF – 0x010000000x003FFFFF – 0x000000000x013FFFFF – 0x010000000x023FFFFF – 0x020000000x033FFFFF – 0x03000000Bank 2 0x007FFFFF – 0x00400000 0x007FFFFF – 0x004000000x017FFFFF – 0x014000000x007FFFFF – 0x004000000x017FFFFF – 0x014000000x027FFFFF – 0x024000000x037FFFFF – 0x03400000Bank 3 0x00BFFFFF – 0x00800000 0x00BFFFFF – 0x008000000x01BFFFFF – 0x018000000x00BFFFFF – 0x008000000x01BFFFFF – 0x018000000x02BFFFFF – 0x028000000x03BFFFFF – 0x03800000Bank 4 0x00FFFFFF – 0x00C00000 0x00FFFFFF – 0x00C000000x01FFFFFF – 0x01C000000x00FFFFFF – 0x00C000000x01FFFFFF – 0x01C000000x02FFFFFF – 0x02C000000x03FFFFFF – 0x03C000007.3.9.2 FLASHTwo flash memory chips U10 and U11 are organized as 1M x 32 for non-volatileprogram storage (Flash). These two chips have 4 Mbytes of flash memory with theability of expansion up to 8 Mbytes. One or more flash sectors contain "bootloader" code,which contains enough functionality to load and store new versions of application code.7.3.9.3 Quad UARTThe QUART circuit for the Controller Board is shown on Schematic Diagram WD-CB101069V1, Sheet 17.Quad Universal Asynchronous Receiver-Transmitter (QUART) U28 is used to handleasynchronous serial data communication.The serial port is a general-purpose interface that conforms to the RecommendedStandard–232C (RS-232C) and can be used to interface with almost any type of device(modem, mouse and serial printer, etc.).Quad UART U28 provides four additional serial ports for microprocessor U9. U28 ispowered by 3.3V, which forces the microprocessor interface to be asynchronous and runat 14.75 MHz, the microprocessor bus clock divided by 2 inside the EPLD. Thecommunication clock input is 3.6864 MHz, the microprocessor bus clock divided by 8inside the EPDL. None of the I/O ports of the QUART are used at this time.The QUART uses two chip selects, CS2 and CS3. Chip select CS2 is used whenaccessing the QUART registers. Chip select CS3 is used after an interrupt to read theinterrupt vector.

CIRCUIT ANALYSISMM101271V1 R2A 417.4 SitePro MODEM BOARDThe SitePro Modem Board contains three synchronous serial ports (modems) and a localmicroprocessor. This board plugs into the Controller Board using two connectors,QUICC (J9) and I/O (J2). Refer to Figure 9 - Site Pro Modem Board Block Diagram.The microprocessor interface is a simple 8-bit bus port with two separate chip selects.One chip select controls access to an 8k x 8 dual port RAM. The other chip selectcontrols access to the Modem Board microprocessor local code memory. The ControllerBoard microprocessor loads the Modem Board local code memory with code beforereleasing the Modem Board reset. The Modem Board microprocessor runs from a 14.7MHz clock generated by dividing down the 29.5 MHz Controller Board microprocessoroutput clock inside the EPLD.Circuits for the SitePro Modem Board, are shown on Schematic Diagram WD-CB101074V1, Sheet 1. The Outline Diagram is shown on AD-CB101074V1.Modem Board CB101074V1 mounts on the Controller Board and exists primarily tosupport Modem chips, U9, U10, and U11. These modems process 9600 baud serialsynchronous receive and transmit data from the RF path (U9), the Phone Line (PL) path(U10) and the Voted Digital Interconnect (VDI) path (U11).Microprocessor U1, a Dallas 80C323, controls the three modem chips, generates transmitdata, and processes receive data for use by the system.The microprocessor communicates with the QUICC processor on the Controller Boardvia Dual Port RAM U3.There is no non-volatile memory on the Modem Board. Code is loaded into Code RAM(U2) via an interface from the QUICC processor.The microprocessor circuitry on the Modem Board operates from a 3.3V supply. TheModem chips, however, require 5V. Thus a 3.3V to 5V conversion (U6) is needed for allsignals to the Modem chips.7.4.1 ModemsEach Modem chip interfaces to the 80C323 microprocessor via an 8-bit bi-directionaladdress/data bus, and Chip Select (CS/), Read (RD/), Write (WR/), ALE, and Interrupt(INT/) signals.During transmit the microprocessor writes data to the Modem as requested by the Modeminterrupt. The Modem converts the data to a 9600-baud synchronous serial data stream.During receive the Modem chip receives the 9600-baud synchronous serial data streamand interrupts the 80C323 microprocessor whenever it has a complete byte to transfer.The modem must also acquire bit sync and word sync from the data stream.7.4.2 3.3V/5V InterfaceBecause the Modems require a 5V supply, and the microprocessor is on a 3.3V supply, itis necessary to convert the voltage of signals passing between them. This is done by U6,an IDT74FCT164245 3.3V/5V converter. Both output enable and direction can becontrolled for the two 8-bit sections of this IC.

CIRCUIT ANALYSIS42 MM101271V1 R2AQD0 - QD7QA0 - QA15D0 - D7A0 - A12QUICCIFCJ1 U3DUALPORT RAMU180C323A0 - A7A8 - A15U78-BITLATCHA0 - A15D0 - D7U2CODESRAM128k x 8A0 - A15 A0A14D0D7U4SRAM128k x 8U6CONVU9RFMODEMU10PLMODEMU11VDIMODEMU13DATABUFFER (8)U12ADDRESSBUFFER (16)A0 - A15AD0 - AD7A0 - A7VDIMODCS/U5ADDRESSDECODER210E543210A15A14A13DPRCS/PLMODCS/RFMODCS/RD/WR/X1X1X1A/D0-7A/D0-7A/D0-7RFRXDATRFTXDATRFTXCLKRFRCVDATRFRCVCLKRFCS_5ALE_5 CS/ALERD_5WR_5RESET_5RFINTRD/WR/RESININT/RFMODCS/PLMODCS/UDIMODCS/DATADIRRD/RESET G1DIR OERFCS_5PLCS_5VDICS_5ALE_5RD/_5WR/_5RESET_5RFMODCS/PLMODCS/ALERD/WR/RESETVDIMODCS/DATADIROEDIR3.3VLERESETALEU53.3VRFINT/PLINT/VDIINT/RXD0TXD0RSD1TXD1INT0/INT/RRWINT/PLINT/RD/WR/ALEPSEN/EAX114.746 MHzRESET RESETRESET/RESETRESETIN/R/WL/PSEN/OEDIRD0 - D73.3VR/W/LCODECS/CODE-A16CODECS/QCODECS/QRD/ DEL/QDPRCS/ CEL/QWR/ R/W/LMODINT2NUC INTL/BSY/ BUSYL/14.756MHz 14.756MHzRESET2MOD RESETIN/RD/OEL/ OEL OERCEL/ CEL CER DFRCS/R/WL/ R/WRR/WL WR/BUSYL/SEML SEMRINTL/ INTL# INTR INT/RBUSYR3.3VM/SDIROEOE/3.3 VCODE-A16A16A0 - A15RD/ OE/CS/WE/WR/A15 P3.4P3.5P1.1P1.4P1.6P1.0P3.0P3.1P3.2P3.3P3.2 INT0/P3.3 INT1/P1.5 INT3/P1.7 INT5/P3.7P3.611 MHzCODE-A16CS/WR/WAL1WAL2LSRXWALCLKHSACQCTLMODFSLFigure 9 - Site Pro Modem Board Block Diagram

CIRCUIT ANALYSISMM101271V1 R2A 43In this case, the outputs are always enabled, so the OE/ pins are tied low. Section 1 isused for signals which only go from the microprocessor to the Modems, so Pin 1 (1DIR)is tied high. Section 2 is used for the bi-directional bus. Pin 24 (2DIR) is driven by logicwhich sets the direction from microprocessor to Modems (high) most of the time. Onlyduring a read of one of the modems is the direction reversed (low).7.4.3 MicroprocessorThe 80C323 microprocessor is a 3.3V version of the Dallas Speedy micro, an 80C32derivative. It operates on a 14.7462 MHz. clock, which is convenient for generatingstandard baud rates. It interfaces with the Modems, Code RAM, Dual Port RAM, andData RAM via standard address and data busses.The microprocessor has 2 asynchronous serial ports (TXD0/RXD0 and TXD1/RXD1)which may be used in the SitePro Controller system for diagnostics. Both ports areavailable on the rear of the SitePro Controller shelf.Six bits of 80C323 microprocessor I/O are used in a SitePro Controller configuration.WALCLK, WAL1, WAL2, and HSACQCTL are outputs, while LSRX and MODFSL areinputs.The microprocessor has only two level sensitive interrupts, INT0/ and INT1/. The first,INT0/, is used for all Modem interrupts. The second, INT1/, is used for interrupts fromthe Dual Port Ram.Since it is still necessary to distinguish between the three Modem interrupts, RFINT/ andPLINT/ are brought to I/O pins so the microprocessor can easily determine whichModem is interrupting. i.e. If a Modem interrupt occurs, the microprocessor looks at thetwo pins. If either or both are low, the corresponding interrupts are serviced. If neither islow, the VDI interrupt is serviced.The 80C323 (U1) uses standard Intel multiplexed address/data bussing. During the firsthalf of the bus cycle, U7 latches the lower 8 bits of address under the control of ALE.Address decoder U5 generates the Chip Selects for the three modems and the Dual PortRAM using signals RD/, WR/, A13, A14, and A15.Table 9 - Memory MapMEMORY MAPDevice Range Addressable SizeCode RAM 0-FFFF 64K BytesDual Port RAM 0-1FFF 8K BytesData RAM 8000-FFFF 32K BytesRF Modem 2000-2003 4 BytesPL Modem 4000-4003 4 BytesVDI Modem 6000-6003 4 Bytes7.4.4 Code MemoryCode is stored in 128K byte RAM U2. The microprocessor can then access it via theAddress and Data bus using PSEN/.Code is loaded into U2 from the QUICC microprocessor. During loading, the QUICCholds the 80C323 reset with the RESETIN/ (low) signal. This is required so the 80C323

CIRCUIT ANALYSIS44 MM101271V1 R2Awill not try to access U2 at the same time causing bus contentions. During loading, bustransceivers U12 (address bus) and U13 (data bus) are turned on. They are held inactiveat all other times by the same RESETIN/ signal.The QUICC controls Code memory access through signals RESETIN/, R/WL/,CODECS/ and CODE_A16. While RESETIN/ is held low, the QUICC can write or readU2. CODE_A16 can be used to control which 64K byte half of U2 is used. Thus, forinstance, Control Channel code could be stored in one half and working channel code inthe other. The switch is performed, while the 80C323 is held at reset, so it is entirelytransparent to the 80C323.When RESETIN/ is high, the bus transceivers U12 and U13 are off and the 80C323controls the bus.7.4.5 Data MemoryData is stored in 128K byte RAM U4, however, only 32K is used. Chip select is A15/,thus the RAM is addressed in the upper half of memory space.7.4.6 Dual Port RamDual Port RAM U3, an IDT70V05 8K byte device, is the communication link betweenQUICC and 80C323 during normal operation. Either microprocessor can read or writeany location in the RAM. Protocols must be established in software to avoid contention.The QUICC can interrupt the 80C323 by writing to Address 1FFF. This causes interruptline INTR/ to go low. It is cleared by a read of the same address by the 80C323.Likewise, the 80C323 can interrupt the QUICC by writing to address 1FFE, which causesa QUICC interrupt on line INTL/.The 80C323 accesses the DPR via its address and data busses using signals DPRCS/,RD/, WR/, and INTl/.The QUICC accesses the DPR via its address and data busses using correspondingsignals CEL/, R/WL/, OEL/, and INTL/.7.4.7 Troubleshooting AidsSeveral signals are available on diagnostic connector J3 for troubleshooting purposes.Also probe points are provided for GND, 5V, and 3.3V.7.5 ROCKWELL MODEM INTERFACE CARD (A3)The SitePro Controller shelf uses Rockwell Modem Interface Card ROA 117 2247/1 andRockwell Modem Assembly, RYTUA 921 01/1. For a Description and Circuit Analysisof this card refer to Maintenance Manual LBI-39152.7.6 ANALOG BOARD (A4)Analog Board CV101070V1 contains programmable high-speed filters, low speed encodeand low speed decode filters. This board includes Simulcast Interface hardware, whicheliminates the need for the older Simulcast Interface Board in Simulcast applications.Refer to Figure 11 - Analog Board Block Diagram, Outline Diagram AD-CB101070V1and Schematic Diagram WD-CB101070V1.

CIRCUIT ANALYSISMM101271V1 R2A 457.6.1 Quad ADC and Single DACAD/DA Converter U23 is an 8-bit CMOS data acquisition device with four analog inputs,one analog output and a serial I2C-bus interface. Three address pins A0 (Pin 5), A1 (Pin6) and A2 (Pin 7) can be used for programming a hardware address, allowing up to eightsimilar devices to be connected to the I2C-bus without additional hardware. In thisapplication, these three leads are tied to +5V. Address, control and data to and from thedevice are transferred serially through the two-line bi-directional I2C-Bus. The PWRSENSE lead is connected to analog input AIN0 at U23, Pin 1, converted to a digital wordand read via the I2C-bus. Monitoring PWR SENSE is the only application for the ADConverter at present.The I2C address is 9E hex. Bits 7-4 are hardwired in the device. Bits 3, 2, 1 are A2, A1 &A0. Bit 0 is the Read/Write bit.R/WA21A11A01HARDWIREDPINS1001Figure 10 - I2C Address7.6.2 8-Bit I/O Expander for I2C BusI/O Expander U4 is a 16-bit two-line quasi-bi-directional port and an I2C-bus interface.The two-line I2C inputs SCL and SDA connect to U4, Pins 22 and 23 respectively. Thesetwo-line inputs can be monitored at Test Points TP2 and TP3. The expanded outputs andconnections are U4,• Pin 4 (P0) – HS-FILTERSEL0(Monitored at TP19)• Pin 13 (P10) - ground• Pin 5 (P1) – HS-FILTERSEL1(Monitored at TP24)• Pin 14 (P11) - ground• Pin 6 (P2) – HS-FILTERSEL2(Monitored at TP25)• Pin 15 (P12) - ground• Pin 7 (P3) – HSACOCTL1 (Monitoredat TP26• Pin 16 (P13) – ground• Pin 8 (P4) – LSCTL (Monitored atTP30)• Pin 17 (P14) - ground• Pin 9 (P5) - (Monitored at TP29)Not Used• Pin 18 (P15) – Pulled up to +5Vthrough resister network R127, Pin 8• Pin 10 (P6) – MODCTL (Monitored atTP28)• Pin 19 (P16) – Pulled up to +5Vthrough resistor network R127, Pin 7• Pin 11 (P7) – LSDATAACC(Monitored at TP27)• Pin 20 (P17) – Pulled up to +5Vthrough resistor network R127, Pin 5

CIRCUIT ANALYSIS46 MM101271V1 R2A7.6.3 –5 Volt Generation-5 Volt generation is accomplished through voltage regulator U2. –12 Volts is applied toU2, Pin 4 IN. Capacitors C3 and C4 provide filtering of this input. The output is at U2,Pin 3 Out. The –5 Volts is filtered by capacitors C5 and C6. –5Volts can be monitored atTest Point TP31.7.6.4 High-Speed Data Transmit FiltersThe High Speed Data Transmit Filter section consists of an input buffer, five selectableHigh-Speed filters, an 8:1 MUX, a digital pot, output buffering and an analog switch.Buffer/follower circuit U6A precedes the high-speed data transmit filter circuits forRFTXDAT. The output of this circuit can be monitored at TP1. The output of U6A isapplied to the inputs of high-speed Data Transmit Filters:• 9600 Baud Wide Band• 4800 Baud Narrow Band• 9600 Baud Wide Band ETSI6• 4800 Baud Narrow Band ETSI• 9600 Baud Narrow Band Switched Capacitor Filter CircuitThe High Speed Data (HSD) filter filters data transitions to minimize the high-speed-datatransmission bandwidth. The frequency response of the HSD filter section is changed byselecting the output of only one filter circuit with 8:1 MUX U7.High-speed data is a 4800 or 9600 bit per second data stream generated by themicrocomputer through the RF data modem U9 on the Modem Board.7.6.4.1 9600 Baud Wide BandThis HSD filter circuit consists of operational amplifier U5B followed by operationalamplifier U5A. The output of U5A, Pin 1 is applied to the input of 8:1 MUX U7, Pin 4(N01). This HSD amplifier filter output can be monitored at TP4.Table 10 - 9600 Baud WB Filter ResponseFREQUENCY RESPONSE1000 Hz 0 dB (ref)10 Hz 0 dB ± 1dB3000 Hz 0 dB ± 1dB6000 Hz -2 dB ± 1dB7000 Hz -3 dB ± 1dB20000 Hz <-20 dB 6 European Technical Standards Institute

CIRCUIT ANALYSISMM101271V1 R2A 477.6.4.2 4800 Baud Narrow BandThis HSD filter circuit consists of operational amplifier U5C followed by operationalamplifier U5D. The output of U5D, Pin 14 is applied to the input of 8:1 MUX U7, Pin 5(N02). This HSD amplifier filter output can be monitored at TP5.Table 11 - 4800 Baud NB Filter ResponseFREQUENCY RESPONSE500 Hz 0 dB (ref)10 Hz 0 dB ± 1 dB1500 Hz 0 dB ± 1dB3000 Hz -2 dB ± 1dB3500 Hz -3 dB ± 1dB10000 Hz <-20 dB7.6.4.3 9600 Baud Wide Band ETSIThis HSD filter circuit consists of operational amplifier U10B followed by operationalamplifier U10A. The output of U10A, Pin 1 is applied to the input of 8:1 MUX U7, Pin 6(N03). This HSD amplifier filter output can be monitored at TP6.Table 12 - 9600 Baud WB ETSI Filter ResponseFREQUENCY RESPONSE1000 Hz 0 dB (ref)10 Hz 0 dB ± 1dB2000 Hz 0 dB ± 1dB3600 Hz -2 dB ± 1dB4600 Hz -3dB ± 1dB12000 Hz <-20 dB7.6.4.4 4800 Baud Narrow Band ETSIThis HSD filter circuit consists of operational amplifier U510C followed by operationalamplifier U10D. The output of U10D, Pin 14 is applied to the input of 8:1 MUX U7, Pin7 (N04). This HSD amplifier filter output can be monitored at TP7.Table 13 - 4800 Baud NB ETSI Filter ResponseFREQUENCY RESPONSE500 Hz 0 dB (ref)10 Hz 0 dB ± 1dB1000 Hz 0 dB ± 1dB2300 Hz -2 dB ± 1dB3000 Hz -3 dB ± 1dB8000 Hz <-20 dB

CIRCUIT ANALYSIS48 MM101271V1 R2A7.6.4.5 9600 Baud Narrow BandThis HSD filter circuit consists of switched-capacitor filter circuit U11 required toproduce a narrow frequency response. This circuit is driven by an external 400 kHz clockon U11, Pin 1. The output on U11, Pin 5 is applied to the input of 8:1 MUX U7, Pin 12(N05). This HSD filter circuit output can be monitored at TP8.Table 14 - 9600 Baud NB Filter ResponseFREQUENCY RESPONSE100 Hz 0 dB (ref)10 Hz 0 dB ± 1dB3800 Hz <-3 dB4400 Hz <-3 dB11000 Hz <-20 dB7.6.4.6 8:1 MUXMultiplexer circuit U7 is used to select the applicable HSD to be passed on to DualDigital Potentiometer U8. The inputs to U7 are applied to N01 through N05 (Pins 4, 5, 6,7 and 12). The selection of HSD is made by the HS-FILTER_SEL inputs on U7, Pin 1(A0), Pin 16 (A1) and Pin 15 (A2).Table 15 - HSD SelectionA2,A1,A0 ACTION NO# HSD000 Selects NO1 9600 WB001 Selects NO2 4800 NB010 Selects NO3 9600 WB ETSI011 Selects NO4 4800 NB ETSI100 Selects NO5 9600 NB101 6110 7111 8QuietEN (Enable) on Pin 2 is connected to +5V always enabled. The 8:1 MUX output COM ison U7, Pin 8. Selections of NO6 through NO8 (all grounded) results in a quiet output.7.6.4.7 Dual Digital PotThe output of the MUX circuit connects to the input of Addressable Dual DigitalPotentiometer U8, Pin 14 (HO). This device has two independently controlledpotentiometers. Only one pot is used in this application. The wiper can be set to one of256 positions and is controlled by the microprocessor through the I2C data bus SCL (Pin9) and SDA (Pin 10). The output on Pin 12 (WO) connects to the input of amplifiercircuit U6B. Pot I2C address is 50 hex.

CIRCUIT ANALYSISMM101271V1 R2A 497.6.4.8 Inverting Buffer/AmplifierAmplifier circuit U6B is an inverting buffer/amplifier with a gain of approximately 1.5.The output of this circuit is connected to the input of analog switch U9. The output of thiscircuit can be monitored at TP9.7.6.4.9 Analog SwitchAnalog Switch U9 is a Single-Pole/Double Throw (SPDT) with one normally closed andone normally open switch. Analog Switch U9 switches between RFTXDATA (U9, Pin 2(S1)) coming from inverting Buffer/amplifier U6B and ANALOG AUDIO (U9, Pin 8(S2)) under the control of MODCTL, Pin 6 output of I2C I/O Expander U4. S1, Pin 2(RFTXDATA) is connected when MODCTL=0. The output is on U9, Pin 1 (D) MOD.7.6.5 Clock GenerationClock generation is accomplished by inverter circuits U32C and U32D and Dual 4-StageBinary Ripple Counter U3. U32C and 400 kHz crystal Y1 form a 400 kHz Pierceoscillator circuit. The output of U32C connects to the input of buffer U32D. The 400 kHzclock (CLK) output of 32D connects to U3, Pin 1 (CP1). This 400 kHz CLK can bemonitored at TP10. Counter U3 divides the 400 kHz CLK down to produce a 25 kHzCLK. This output can be monitored at TP11. The 400 kHz CLK is further divided downto produce a 3.125 kHz CLK. This output can be monitored at TP12.7.6.6 Low -Speed Data Decode Filters and SlicerThe Low-Speed Data Decode Filter is used to remove voice-audio (300-3000 Hz) leavingonly the low-speed or subaudible data for an input to the microprocessor.VOL/SQ/HI couples both high and low speed data through capacitor C33 to the input ofbuffer/follower circuit U15A. The output of U15A, monitored at TP13, connects to theinput of two circuits. The first connection is the input to the low speed data decode filterthrough operational amplifier U15B. The second connection is the input of a high-speeddata slicer circuit consisting of MUX U31 and voltage comparator U33A.Low-Speed Decode Filter:Operational amplifier U15B provides an approximate gain of 2:1, monitored at TP15.The output of U15B connects to the input of high pass filter U16. High pass filter U16 isdriven by a 3.125 kHzCLK on Pin 16 (CLK) and is a 4th order Butterworth filter. Itprovides -3 dB rolloff @ 50 Hz and -35 dB rolloff @ 18 Hz (Table 16 - Low Speed DataDecode Filter Response). The output of U16, monitored at TP16, is applied to the inputof low pass filter U14. Low pass filter U14 is synchronized by a 25 kHz clock applied toPin 3 (CLK) and is an 8th order elliptic filter. It is flat to 250 Hz and provides more than -40 dB rolloff @ 300 Hz.The output of U14, monitored at TP17, is applied to the input of buffer/amplifier U28Athough 0 ohm resistors R61 and R61. U28A provides a gain of 2, monitored at TP18. Theoutput of U28A connects to the input of voltage comparator circuit U12B.Analog switch U18 connects/disconnects resistor R67 normally in parallel with resistorR60 connected to U12B, Pin 6. This function is controlled by LSDATAACQ on U18, Pin6 (IN). LSDATAACQ is one of the I2C I/O expander outputs. When Pin 6 is low R67 is

CIRCUIT ANALYSIS50 MM101271V1 R2Ain parallel with R60. When Pin 6 is high R67 has been removed from the circuit. MovingR67 in and out of the circuit adjusts the input time constant to U12B, Pin 6.Voltage comparator U12B provides a square wave output that swings from +12 to -12volts, monitored at TP14. This output is applied through resistor R58 to the base of NPNtransistor Q1. Transistor Q1 interfaces the limited signal LSIN to the Controller Board.Table 16 - Low Speed Data Decode Filter ResponseFREQUENCY RESPONSE100 Hz 0 dB (ref)50 Hz -3 dB ± 1dB18 Hz -35 dB ± 3 dB250 Hz -0 dB ± 1dB300 Hz <-40 dBHigh Speed SlicerThe High Speed slicer circuit converts 9600 baud noisy received data to hard 1's and 0's,producing a +5Volt square wave at the output of U33A. This output is controlled by theHSACQCTL0 and HSACQCTL1 inputs to U31, Pins 1 (A0) and 14 (A1) respectively.HSACQCTL0 is controlled directly by microprocessor 80C323 rapidly controlling thereceive acquisition rate by adjusting the input time constant to U33A. The Time Constant(TC) is adjusted to provide a fast TC to follow the initial frequency variation of thetransmitting radio, then a slow TC to better slice the data after the frequency becomesstable.The TC is adjusted by selecting a resistor to connect in the negative input terminal ofU33A (Pin 2). Resistors are selected as shown in the following table:Table 17 - Acquisition RatesA1, A0 NO# RESISTOR ACQUISITION00 NO1 R40 FAST01 NO2 R43 SLOW10 NO3 R125 ETSI FAST11 NO4 R126 ETSI SLOWA0 = HSACQCTL0A1 = HSACQCTL1HSACQCTL1 is controlled by the I2C bus and is only changed at power up or reset toswitch between US and ETSI bandwidths.The output of the high-speed data decode filter RFRXDAT connects to the ControllerBoard.7.6.7 Low Speed Data Encode FilterThe Low Speed Data Encode filter is used to smooth out transitions of data impressedupon the voice audio. Low-speed data is a 150 bit per second data stream generated bythe microcomputer and used to produce subaudible data on the voice audio.

CIRCUIT ANALYSISMM101271V1 R2A 51Low-Speed Data is generated by microcomputer U1 on the Modem Board through EPLDU27, Pins 81 and 80, Walsh Bit 1 and Walsh Bit 2 respectively. For low-speed data, thetwo Walsh bits are scaled by resistors R91 and R95 and summed through analog switchU22. The output of U22, Pin 1 (D) connects through operational amplifier U19A andbuffer/follower U19B to the input of the low-speed-data encode filter U20. Operationalamplifier U19A produces a loss of -9 dB at TP23. The output of buffer U19B, monitoredat TP22 connects to the input of low-pass filter U20, Pin 14 (IN). Low pass filter U20 issynchronized by a 25 kHz clock applied to Pin 3 (CLK) and is an 8th order elliptic filter.For the frequency response refer to the following table.Table 18 - Low-Speed Data Encode Filter ResponseFREQUENCY RESPONSE100 Hz 0 dB (ref)5 Hz +1 dB ± 2dB150 Hz -1.5 dB ± 1 dB250 Hz -4 dB ± 1dB300 Hz <-40 dBThe output of this filter, monitored at TP21, connects through 0 ohm resistor R84 to theinput of operational amplifier U17A, Pin 3. U17A provides a gain of 2:1. LSDTXconnects to J1B, Pin 21 through Interconnect Board A1 to the EDACS connector J12, Pin23 (LSDTXMOD). This provides the low frequency Channel Guard modulation input tothe base station transmitter.7.6.8 Simulcast Control CircuitsSimulcast control circuits, consisting of RS-232 and RS-422 drivers, convert (RS-232 -TTL - RS-422) and buffer control signals coming from SitePro Controller Board A2.Refer to the second page of Figure 11 - Analog Board Block Diagram. These signals arepassed through Simulcast connector J13, on Interconnect Board A1, and connect to theSimulcast cross connect panel. Likewise, RS-422 drivers convert (RS-422 to TTL) andbuffer signals coming from the cross connect panel, passing through A1 and going toSitePro Controller Board A2.A Simulcast "bypass" control signal, when low, forces the Simulcast site to operate in anon-Simulcast mode and is driven by Simulcast control equipment. The active lowbypass control line, BYPASS, originates at the Simulcast control equipment, and is usedto re-route audio paths at the SitePro interface module located in a station interface panel.It also serves to re-route 9600 BPS data, 150 BPS data, A/D control line and the PTTcontrol line, all of which are directed back to the SitePro Controller Board.Control SignalsRS-232 Drivers/Receivers U24 and Quad RS-422 Line Driver U25 converts and bufferssignals coming from the SitePro Controller Board and going to the Simulcast crossconnect panel. These signals are:• PLTXDAT (IN)• PLTXCLK (IN)• PLTXDAT + (OUT)• PLTXDAT - (OUT)• PLTXCLK + (OUT)• PLTXCLK - (OUT)

CIRCUIT ANALYSIS52 MM101271V1 R2AQuad RS422 receiver U26 converts and buffers signals coming from the Simulcast crossconnect panel going to the SitePro controller Board. These signals are:• 150 Hz + (IN)• 150 Hz - (IN)• 9.6 DATA + (IN)• 9.6 DATA - (IN)• 9.6 REF + (IN)• 9.6 REF - (IN)• EXT 150 Hz + (OUT)• EXT 9.6 DATA + (OUT)• EXT 9.6 REF + (OUT)Audio SwitchingThe audio bypass circuit consisting of relay driver U27 and relays K1 and K2 allows theaudio to be interrupted and receive voice to be sent back to the station, when in thebypass mode.In normal Simulcast operation Rx AUDIO L connects through relay K1 to RXV R. TXAUDIO L connects though K1 to TXV R. Also, RX AUDIO H connects through relayK2 to RXV T. TX AUDIO H connects through K2 to TXV T.When the BYPASS signal goes low, forward biasing diode D15, relay drivers U27 causerelays K1 and K2 to activate. This action places the Simulcast System in the Bypassmode. RX AUDIO L now connects through K1 to TX AUDIO L. Likewise, RX AUDIOH connects through K2 to TX AUDIO H, returning the audio back to the station.

CIRCUIT ANALYSISMM101271V1 R2A 53VOLSQHISLICERRFRXDATLSINHIGHPASSLOWPASS LIMITERLSDECODEFILTER-5 VOLTREGULATOR-12 V -5 VMUXLOW SPEEDENCODEFILTERWALSH 1LSDTX150 HzLSCTLCLOCK(400 kHzOSC)400 kHz25 kHz3.125 kHzSDASCLI2CEXPANDERHS_FILTER_SEL 0HS_FILTER_SEL 1HS_FILTER_SEL 2HSACQCTL 1LSCTLBit 5 (Not Used)MODCTLLSDATAACQI2CEEPROMU34SCLSDASCLSDAI2C ADC & DACSPARE D/ASPARE A/DPWR SENSERFTXDAT9600 BAUDWIDEBAND4800 BAUD NARROWBAND9600 BAUDWIDEBAND ETSI4800 BAUD NARROW BAND ETSI9600 BAUDNARROW BANDMUXHS_FILTER_SEL 0HS_FILTER_SEL 1HS_FILTER_SEL 2I2CDIGITAL POTSDASCLMUX MODMODCTLANALOG_AUDIOFigure 11 - Analog Board Block Diagram

CIRCUIT ANALYSIS54 MM101271V1 R2ARS-232 RXPLTXCLK PLTXCLK +PLTXDAT +PLTXDAT -PLTXDATPLTXCLK -RS-422 TXRS-422 RX150 Hz +150 Hz -9.6 DATA +9.6 DATA -9.6 REF +9.6 REF -EXT150HZEXT9.6DATAEXT9.6REFRX_AUDIO_HRELAYDRIVERRELAYSK1 & k2TXV_RRXV_RRX_AUDIO_LTX_AUDIO_LTX_AUDIO_HTXV_TRXV_TSIMULCAST INTERFACE CIRCUITSBYPASSFigure 11 - Analog Board Block Diagram (Continued)

CIRCUIT ANALYSISMM101271V1 R2A 557.7 POWER SUPPLY (A5) PS101328V1The power supply used with the SitePro Controller is a 40 watt DC-DC, open framesupply (Figure 2 - SitePro Controller Shelf Assembly). Specifications for this supply are:INPUT VOLTAGE: 24 VDC nominal; 10-30 VDC continuous input.INPUT CURRENT: Maximum input current at minimum 10 VDCwith full rated output load at 6 Amps max.DC OUTPUTS:OUTPUT OUTPUT(V)MINIMUMLOADCURRENT (I) TOTALREGULATIONV1 OVPSET.RIPPLEANDNOISENOTES1 +5.1 V 0.1 Amp 4 Amps 2% 6.2±0.6V 1%2 +12 V 0.05 Amp 2 Amps 6% 1% A & B3 -12 V 0 Amps 0.4 Amp 5% 1%OUTPUT POWER: Normal continuous output power is 40 W, 45 Wpeak for 60 seconds.OVERLOAD PROTECTION: Fully protected against short circuit and outputoverload.TEMPERATURE RANGE: -30 to 60°C at full rated output power.HUMIDITY: Operating 0-95% RHALTITUDE: Operating -500 to 10,000 ft.7.8 MISCELLANEOUS INFORMATION7.8.1 Serial Port Data FormatThe serial ports transfer RS-232 asynchronous serial data at a rate of 38.4k using the half-duplex operating mode. That is, data flows in only one direction at a time. Thecharacteristics of the communication link are:Type: RS-232CBaud Rate: 38.4 kilobaudStart Bits: 1Stop Bits: 1Parity: NoneData Type: Binary

PERSONALITY PROGRAMMING56 MM101271V1 R2A8.0 PERSONALITY PROGRAMMINGA personality is a computer file generated by the user. This file (or personality) isdownloaded into the SitePro Controller and contains data that directs operatingcharacteristics of the SitePro Controller unit. This allows each SitePro Controller to beprogrammed as required by the application. The SitePro Controller personality includessystem configuration information such as channel frequencies, call parameters, operatingmodes, and identification information.The personality programming process stores data in non-volatile regions of memory. TheSitePro Controller shelf has its personality stored in two locations. The first location isEEPROM U14 on Controller Board A2 and contains general site level information. Theother location is EEPROM U34 on Analog Board A4 and contains general channel levelinformation. Programming is performed through serial programming port J8 on the frontof the Controller Board (Figure 13 - Location of Serial Programming Port J8).Programming can also be accomplished through an Ethernet connection.The Personality Programming process involves using SitePro PC Programmer TQ3408software, which creates the desired personality and transfers the Personality data to theEEPROM's U14 on the Controller Board and U34 on the Analog Board.Equipment Required:• Computer capable of running Windows95/98NT/2000/ME, which has a serial and/orEthernet port according to following tables.• Programming Manual MM101461V1• Programming software TQ3408• Programming cable CA101302V1• Male DB-25 to female DB-9 adapter or cable if the computer serial port is a maleDB-9 connector instead of a male DB-25 connectorTable 19 -Minimum Operating System RequirementsWindows 9x Windows NT Windows 2000Processor Speed Pentium II 300MHzPentium II 300MHzPentium II 300MHzRAM for Windows 16 Megabytes 24 Megabytes 64 MegabytesRAM for HardDrive 10 Megabytes 10 Megabytes 10 MegabytesDrives CD ROM CD ROM CD ROMPorts 1 Serial orEthernet1 Serial orEthernet1 Serial orEthernetMicrosoft InternetExplorerVersion 5.0 orhigherVersion 5.0 orhigherVersion 5.0 orhigher

PERSONALITY PROGRAMMINGMM101271V1 R2A 578.1 PROGRAMMING A PERSONALITY1. Install and run SitePro programming software TQ3408.2. Connect one end of serial programming cable CA101302V1 (TQ3408) to thecomputer (Figure 12 - Programming Hook-Up). Connect the other end of thecable to the SitePro Controller Serial Programming Port J8 (Figure 13 - Locationof Serial Programming Port J8).3. Proceed with personality programming by running the program as instructed inProgramming Manual MM101461V1.CD ROM ProgrammingDiskJ7S1 J8D1 D2 D3 D4 D5 D8S2DipswitchResetPushbuttonStatusLED'sL1 L2 L3 L4 ETH0ETH1D12PowerLEDU14PersonalityEEPROMCONTROLLERBOARD A2CB101069V1J1ANALOGBOARD A4CB101070V1I2CProgramming CableCA101302V1To COM PortPersonalComputerEEPROMU34Figure 12 - Programming Hook-UpFigure 13 - Location of Serial Programming Port J8(Front Left of SitePro Controller with Hinged Door Open)SerialProgramming PortJ8Hinged Door

TROUBLESHOOTING58 MM101271V1 R2A9.0 TROUBLESHOOTINGThe most common causes for problems encountered with the SitePro Controller areprogramming errors and interface connections.9.1 ON SITE TROUBLESHOOTINGWhen troubleshooting a SitePro Controller on site:1. Verify that all cables are properly connected and secure. Refer to the applicableconfiguration manual.2. Verify the SitePro Controller personality is properly programmed for the specificapplication. Refer to the configuration manual and the software release notes.3. If it is suspected that the SitePro Controller has failed, replace the controller with aknown good unit, properly programmed for this application.4. If the replacement SitePro Controller resolves the problem, bench check the defectiveunit using the test procedures provided in this manual or send it to the repair andreturn depot.9.2 IN CASE OF DIFFICULTYIf unable to resolve a problem satisfactorily, contact the M/A-COM Technical AssistanceCenter (TAC) at 1 (800) 528-7711 (Outside USA, (434)-385-2400).9.3 SITEPRO SHELF TEST9.3.1 Equipment Needed• 13.8V Power Supply (2A min)• Current Meter• PC with terminal emulator• Loopback cables – described below• Power Cable• RJ-45 to PC serial cable• RJ-11 to PC serial cableBoth serial cables are connected per the chart below. One cable is RJ-45 (8 pin modular)to DB-9F. The other cable is RJ-11 (6 pin Modular) to DB-9F.Table 20 - Cable ConnectionsSIGNAL RJ PIN DB-9F PIN SIGNALTx 2 2 RxRx 1 3 TxGnd 3 5 Gnd

TROUBLESHOOTINGMM101271V1 R2A 591. Connect power (13.8V) to J7 on the rear of the shelf. Measure total shelf current.Current should be within the limits shown in the table below. Connect +13.8VDCto J7-1 and GND to J7-2.Table 21 - Current (I) LimitsSHELF DESCRIPTION PARTNUMBERMINCURRENTMAX CURRENTFully loaded shelf EA101209V1 1.0A 1.4AW/O RMIC and RM EA101209V2W/O Analog Board EA101209V3W/O both EA101209V42. Check that the Green front power light came on.3. Check that ‘SITEPRO!’ appears on the front LED Display.4. Check that the +5V, +12V, -12V, and CTS LEDs are lit on the (Rockwell Modem)RMIC Board.5. Set up a terminal emulator on PC COM1 for 38.4Kbaud, 1 start bit, no parity.Connect the PC COM1 serial port to J8 (RJ-11modular jack) on the front of theController Board.6. Set up a second copy of the terminal emulator (or a second PC) connected toCOM2, 2400 baud, 7 bit, odd parity, connected to J14-I (80C323 Port0) (RJ-45modular jack) on the rear of the shelf.The tester should become familiar with the Factory Test program, which is storedin the Controller boards when they arrive from the board manufacturer.NOTEFactory test software is available on a compact disc. The test software is loadedserially like application code.The test program will come up in non-menu mode after three PNG’s. There areseveral modes. For manual test, get into menu mode by typing ENTER, then ‘q’,then ‘m’.Menu Mode – Runs automated tests from a menu. Some menus have sub menus.‘0’ goes to Command mode.Non-Menu Mode – Runs automated tests without displaying the menu (forautomated testing). ‘0’ goes to command mode.Command mode – provides lower level control of board functions. See ‘H’ (help)menu. ‘Q’ goes to menu mode.7. Select test 4 (Modem board tests). Then select sub test 1 (Load a file to the Modemboard). Use the terminal emulator file transfer utility to send the file‘SIMON.HEX’ to the Modem . The upload takes about 10 seconds. Hit ENTER.The header **********SIMON SITEPRO 2001************’ should appear onthe second terminal.

TROUBLESHOOTING60 MM101271V1 R2A8. Get the Factory Test into Command Mode. Send the following commands.SI2C 4C 01 02 (Sets up the I2C to address the I/O expander on the Analog Board)WI2C 00 00 (Selects filter 0 and sets up normal path for RF data)SI2C 50 01 00 (Sets up the I2C to address the Digital Pot on the Analog Board)WI2C A9 50 (Sets the pot to normal level)9.3.2 RF Data Loop Test1. Connect a loopback plug(Figure 16 - Loopback Test Connectors) into J12 (EDACSConnector) on the rear of the shelf (Refer to Figure 14 - RF Data Signal Path).This plug loops pin 19 (MODULATION) to pin 7 (VOL/SQ/HI).From terminal 2 type the commandPOR1=EF (sets HSACQ0CTL) to 1 on the Analog board.From terminal 2, type ‘BERDE-02=1’. In a few seconds, the response below willappear on the terminal.“ERROR COUNT = 0000 RECEIVE CHECKSUM = 027C11”Sometimes the first line displayed is incorrect. Unit passes if the second line iscorrect.2. Hit the ESC key to stop the test.9.3.3 Modem Loop Test1. Connect a loopback plug into J4A (RM0) on the rear of the shelf (Refer to Figure 15- Phone Line Data Signal Path).This plug loops transmit to receive. It is made by tying wires together on an 8-pinmodular plug. Tie pin 2 to pin 4 and pin 3 to pin 5.2. On the RMIC Board, set up Rx and Tx levels by closing sections 2 and 6 of switchS1. Open all other sectionsFrom terminal 1, in menu mode, execute test 4, subtest 3 (Dual Port Ram Test). Thisresets the SitePro Modem Board. The SIMON turn-on banner will appear on terminal2.3. From terminal 2, type ‘MDS 1’.4. From terminal 2, type ‘BERDE-0=1’. In a few seconds, the response below willappear on the terminal.“ERROR COUNT = 0000 RECEIVE CHECKSUM = 027C11”Sometimes the first line displayed is incorrect. Unit passes if the second line iscorrect.5. Hit the ESC key to stop the test.

TROUBLESHOOTINGMM101271V1 R2A 61RF MODEMRFTXDATRFTXCLKRFRXDATRFRXCLKRFTXDRFTXCLKRFRXD RFRXDATRFRXCLKRFTXCLK_OUT RFTXCLKRFTXDAT +AMP-FILTER MUXAMPANALOG BOARD A4AMP++SLICERREAR OFSHELFINTERCONNECT BOARD A2CONTROLLER BOARD A2SITEPRO MODEM BOARD A8(Not Inverted)(Not Inverted)(Not Inverted)PLDLOOPBACKPLUGRF DATA SIGNAL PATHJ12Figure 14 - RF Data Signal Path

TROUBLESHOOTING62 MM101271V1 R2APL MODEMCONTROLLER BOARD A2SITEPROMODEM BOARDA8PLTXDATPLTXCLKPLRXDATPLDPLTXDPLTXCLKPLRXDPLRXCLKPLTXDATPLRXDATPLRXCLKRS-232RTSCTSRJ45REAR OF SHELFROCKWELL MODEM INTERFACE CARD A3PLRXCLKPLRXDATPLTXDATPLTXCLKCTSRTSINTERCONNECT BOARD A1ROCKWELL MODEMAMPAMPTXRX+--+PHONE LINE DATA SIGNALPATHRS-232LOOPBACKPLUGJ4AFigure 15 - Phone Line Data Signal Path

TROUBLESHOOTINGMM101271V1 R2A 639.3.4 Loopback Connectors7135911131517192123JumperTOP VIEWKeyTest Location: Rear of shelf at connector J12AMP1Make using AMP, 24 cavity connector number 102387-5123456RJ-11 ConnectorBottom View: Anchor Clipon opposite side.123456At the rear of theshelf, this testconnector insertsinto the jacklabelled "RM-0".Pin Assignments:1 - N/C2 - RM-TX +3- RM-TX -4 - RM - RX -5 - RM - RX +6 - N/CJumpersBottom View/ (Side without anchor clip)1234 5 6 7 8RJ-45 Connector12 3 6Pin Assignments:1- ETH TX +2- ETH TX -3- ETH RX +4 - N/C5 - N/C6 - ETH RX -7 - N/C8 - N/CTest Connector/Cable isinterchageable fortesting both ETH-0 &ETH-1JumpersFigure 16 - Loopback Test Connectors

TROUBLESHOOTING64 MM101271V1 R2A9.4 FIELD TROUBLESHOOTING GUIDE9.4.1 SitePro Controller BoardThis guide assumes the Controller board is in a SitePro shelf on a bench, not connected toa station, but with 13.8V power applied to J7 of the shelf. It is also assumed that‘FactoryTest’ software resides on the Controller. Modem board test program ‘SIMON’ isalso needed for some of the tests. In most cases, the shelf top cover must be removed.See the Shelf Test Procedure for setup information and some information on FactoryTest.Set up two terminal emulators as described in the Shelf test.This is not a detailed test procedure. It is intended for use in service shops by technicianshaving a high degree of expertise in troubleshooting electronic circuitry. Some circuitscannot be tested at the shelf level.9.4.1.1 REFERENCE DOCUMENTSWD-CB101069V1 - Schematic DiagramTS-CB101069V1 - Test SpecAD-CB101069V1 - Assembly DrawingBlock Diagrams of Controller Board and SitePro Modem Board9.4.1.2 BOARD WILL NOT RUN i.e. FACTORY TEST DOESN’T COME UPProcedure:After 3 PNGs appear on the terminal, wait about 10 seconds or until ‘F R1A01’ or laterversion number appears on the display.ENTER should put the FactoryTest software into Command mode. ‘q’ then ENTER takesit to Non-menu mode, then ‘m’ followed by ENTER should produce the test menu. If noresponse, turn power off then on and retry. If Boot/Loader comes up (> prompt), seriallyload Factory Test.Troubleshooting information:Check 5V at TP6 and 3.3V at TP5.If no voltage, check hot swap controller U37. U32-2 (ON) should be 5V, Mate-detect Aand B should both be grounded. U37-5 (FB) should be 1.3V. U37-6 (GATE) should beabout 16V.If 5V is not seen on U42-2, then 555 timer U40 may be holding the ON pin low exceptfor momentary intervals every second or so.There may be a problem in the serial port SMC1, which is used to interface to the testsystem through the diagnostic connector J8 on the front of the board. This is a normalserial port of the 860 processor. The J8 interface is RS232, which is converted to 3.3Vlevels to the processor. SMC1TX originates from U1 (not accessible) at 3.3V level anddrives RS232 converter U36-17. U36-12 drives J8-2 at RS232 levels. Input from theterminal comes in at RS232 levels to J8-1, which is fed to U24-5 where it is converted to3.3V levels at U24-18 and goes to SMC1RX on U1 (not accessible).

TROUBLESHOOTINGMM101271V1 R2A 65Check 29.4912 MHz oscillator Y2.Check for wrong parts or misoriented parts.Has PLD been programmed? Use FactoryTest Command mode command ‘R PLD_IDALL’ to check PLD version.9.4.2 SitePro Modem Board Tests From The 8609.4.2.1 CODE RAM TESTProcedure:Execute FactoryTest test 4, subtest 2.Troubleshooting information:Failure indicates problem is with U2 on the Modem board or associated circuitry U17 andU18.If Code RAM and DUAL PORT RAM test fail, there may be a bus problem. Test with aknown good Modem board to isolate the problem to the Controller or the Modem.9.4.2.2 DUAL PORT RAM TESTProcedure:Execute Factory Test test 4, subtest 3.Troubleshooting information:Failure indicates a problem communicating with U3 on the Modem Board.IF MODEM BOARD IS BADCheck the Dual Port RAM U3 and Code RAM U2The processor should be held reset during these tests. U1-10 should be HI (3.3V) toreset.IF CONTROLLER IS BADCheck 14.7456MHz on J9-19.Check Data bus activity on J9-1,2,3,4,33,34,35,36Check address bus activity on J9-5 thru12, and 25 thru 32.Check that DPR Chip Select is occurring on J9-15 during DPR test.Check that Code RAM Chip Select is occurring on J9-14 during Code RAM test.Check that RESET is HI (3.3V) on U1-10 during Code RAM test.9.4.2.3 INTERRUPT FEATUREProcedure:Use FactoryTest test 4, subtest 1 to load ‘DCTEST.HEX’. Then execute FactoryTest test4, subtests 4 and 5.

TROUBLESHOOTING66 MM101271V1 R2ATroubleshooting information:Was ‘DCTEST’ loaded into the Modem daughter board?Check DPR U3 on Modem Daughter Board. Pin 38 Interrupts the 80C323 on the ModemBoard. Pin 43 interrupts the 860. This test is an interaction between the Modem Boardand the Controller Board so testing with one known good board can isolate the problem.9.4.3 Modem Board Tests Using Simon9.4.3.1 LOAD SIMONProcedure:Use FactoryTest test 4, subtest 1 to load ‘SIMON.HEX’.Troubleshooting information:If SIMON loads properly, you will hear a beep or see the SIMON turn-on banner appearon the terminal connected to 80C323 Port 0.Failure to load code in the Modem board (applies to DCTEST also) could be due toproblems with Code RAM U2 and associated logic U17 and U18. Processor U1 must beheld reset (U1-10=3.3V) during a code load. It is unreset when ENTER is sent to FactoryTest after a download.9.4.3.2 TEST DPR FROM THE MODEM SIDEProcedure:Execute SIMON Command ‘TMX 0-1FFD’.Troubleshooting information:Assuming SIMON loaded and is running, there must be a problem with DPR U3 or theMicroprocessor (U1)interface to it. Note: Use terminal 2 for SIMON commands.9.4.3.3 TEST MODEM DATA SRAMProcedure:Execute SIMON Command ‘TMX 8000-FFFF’.Troubleshooting information:If SIMON is running, U4 is indicated.9.4.3.4 MODEM BER TEST ON RF MODEMProcedure:This is the same test as the shelf RF loopback test. Execute SIMON Command BERDE-02=1. Correct result is no errors and checksum=027C11.Troubleshooting information:SIMON causes a data stream to be generated in RF Modem U9 at U9-21 (RFTXDAT).This data goes to the Controller Board on J2-30 where it enters the PLD at U27-122

TROUBLESHOOTINGMM101271V1 R2A 67(RFTXD). It exits on U27-38 (RFTXDAT), is buffered and inverted by U29F, enteringon U29-13, exiting on U29-12. It exits the Board on J7-C23.At the rear of the shelf, RFTXDAT is looped back into the Controller board on J7-C26(RFRXDAT_FROM_SLICER). This signal is buffered and inverted by U29D, enteringon U29-9, exiting on U29-8, which drives into the PLD U27-53. It exits the PLD on U27-99 (RFRXD). This goes to the Modem Board on J2-7. On the Modem Board, it goes toU9-19 completing the loop.Refer to RF Loop Test Block Diagram in the instruction book.This test may fail due to problems in the microprocessor U1 interface to the Modem ICU9. This includes 3V/5V converter U6, U21, U23, U16C and perhaps address decoderU5 or U16A. Many negative going interrupt pulses should be seen on U9-24. Check R11.9.4.3.5 MODEM BER TEST ON PL MODEMProcedure:This is the same as the shelf PL loopback test. Reset the Modem Board. SIMONCommands are MDS1 then BERDE-01=1. Correct result is no errors andchecksum=027C11.Troubleshooting information:After running the BER test on the RF Modem (above), SIMON code requires a resetbefore running the BER test on the Phone Line Modem. This can be accomplished byusing FactoryTest to execute test 4, subtest 3 (Dual Port RAM test). This will reset theProcessor then unreset it without affecting loaded code.SIMON causes a data stream to be generated in PL Modem U10 at U10-21 (PLTXDAT).This data goes to the Controller Board on J2-9 where it enters the PLD at U27-31(PLTXD). It exits on U27-23 (PLTXDAT), is buffered, inverted and converted to RS232levels by U30, entering on U30-7, exiting on U30-2. It exits the Board on J7-B19.Data is passed through the Rockwell Modem then, at the rear of the shelf, PLTXDAT islooped back through the Rockwell Modem and into the Controller board on J7-B21(PLRXDAT). This signal is buffered, inverted and converted back to TTL levels by U30,entering on U30-9, exiting on U30-8, which drives into the PLD U27-25. It exits the PLDon U27-34 (PLRXD). This goes to the Modem Board on J2-29. On the Modem Board, itgoes to U10-19 completing the loop.Refer to PL Loop Test Block Diagram in the instruction book.This test may fail due to problems in the microprocessor U1 interface to the Modem ICU10. This includes 3V/5V converter U6, U21, U23, U16C and perhaps address decoderU5 or U16A. Many negative going interrupt pulses should be seen on U10-24. CheckR129.4.3.6 TEST LSDINProcedure:Apply 100Hz 1VPP sine wave to J12-7. This should produce a 0 to 5V 100Hz squarewave at Controller Board connector J7-C10. Observe 3VPP 100Hz square wave at U1-2on the Modem Board.

TROUBLESHOOTING68 MM101271V1 R2ATroubleshooting information:LSDIN is input on J7-C10. It is buffered and inverted by U18D, entering on U18-9,exiting on U18-8. It enters the PLD on U27-106 and exits on U27-98 (LSIN). It goes tothe Modem Board on J2-23. On the Modem board it is called LSRX and goes directly tothe processor U1-2 which is Port 1.0.9.4.3.7 I/O OUTPUTS TEST - GROUP DProcedure:The table below gives the required SIMON commands to exercise each of these 3outputs. It also lists the point to monitor. Use small size easy ball clips to reach the B rowof J7.Table 22 - SIMON CommandsNAME SIMON COMMAND LO SIMON COMMAND HI MONITOR POINTWAL1 POR3=FF POR3=CF J7-B15WAL2 POR3=FF POR3=CF J7-B16HSACQCTL POR1=FF POR1=ED J7-C8Troubleshooting information:This test checks the paths of 3 I/O signals which originate at the 80C323 Microprocessoron the Modem Board, go down to the Controller Board, then through the PLD, thenthrough inverting buffers to the card edge. The paths are tabularized below.Table 23 - I/O Signal PathsNAME ORIG EXITMODEMENTERPLDEXITPLDENTERBUFEXITBUFJ7PINEXITNAMEWAL1 U1-16 J2-16 U27-91 U27-81 U29-3 U29-4 J7-B15 WALSH1WAL2 U1-17 J2-21 U27-90 U27-80 U29-5 U29-6 J7-B16 WALSH2HSACQCTL U1-6 J2-15 U27-86 U27-45 U34-13 U34-12 J7-C8 HSACQ9.4.3.8 TEST LSDOUTProcedure:Issue FactoryTest Command Mode command ’w pld_ctrl 0x00’.Monitor Controller Board pin J7-C9.Issue SIMON command POR3=FF to make the pin go LO.Issue SIMON command POR3=EF to make the pin go HI.Troubleshooting information:This test checks the path of signal LSDOUT. It uses the WAL1 signal tested above togenerate a signal into the PLD. The signal exits the PLD at U27-110. It is buffered andinverted by U32C, entering on U32-5, exiting U32-6 which drives off the board at J7-C9.

TROUBLESHOOTINGMM101271V1 R2A 699.4.3.9 ETHERNET TESTProcedure:Execute FactoryTest test 5, subtests 1 and 2.Troubleshooting information:The FEC is the 10/100 Base-T Ethernet port originating in the 860 MII port whichinterfaces to Network PHY device U5. U5 drives transformer T1 which drives off theboard to Ethernet Port 0. Tx+ and Tx- are on pins J7-A2 and J7-A3. Rx+ and Rx- are onpins J7-A5 and J7-A6.SCC1 is the 10 Base-T Ethernet port originating in the 860 SCC1 port which interfaces toNetwork PHY device U12. U12 drives transformer T2, which drives off the board toEthernet Port 1. Tx+ and Tx- are on pins J7-A8 and J7-A9. Rx+ and Rx- are on pins J7-A11 and J7-A12.Three tests are run on each Ethernet port.The first test performs a loopback test entirely inside the 860 processor. It should neverfail.The second test performs a loopback test inside the PHY chip. Failure indicates aproblem with the PHY chip or the connections from the 860 to the PHY.The third test performs an external loopback test with the TX (+ and -) looped back toRX (+ and -) using a loopback plug on the rear of the shelf. These connections must bevery short. If the first 2 tests pass, failure indicates problems with the transformer or theconnections from the PHY to the transformer, or the loopback plug.9.4.3.10 LED TESTProcedure:Execute FactoryTest test 6.Troubleshooting information:I2C bus may be shorted. Check that SDA and SDL are normally 5V and bursts of dataand clock are seen when the test is run. Clock and data should show no appreciable riseor fall times at a sweep rate of 100us per division. If other I2C devices are working, thenU15 is indicated.9.4.3.11 DIPSWITCH TESTProcedure:Execute FactoryTest test 7.Troubleshooting information:If other I2C devices are working, then U26 is indicated, possibly pullup resistor packRN12 or bad switch S2.

TROUBLESHOOTING70 MM101271V1 R2A9.4.3.12 EEPROM LOAD TESTProcedure:Execute FactoryTest test 6, subtest 1.Troubleshooting information:If other I2C devices are working, then U14 is indicated.9.4.3.13 DRAM TESTProcedure:Execute FactoryTest test 9.Troubleshooting information:Software is actually running out of DRAM. The test only checks that portion not beingused by the program. This is a test of U2 and U7.9.4.3.14 FLASH TESTProcedure:Execute FactoryTest test 10.Troubleshooting information:Test software is stored in the Flash memory so the test only checks that portion notholding code. This is a check of U10 and U11.9.4.3.15 TEST SERIAL PORT QUART CProcedure:Connect terminal to J14C on the rear of the shelf. Set terminal for 9600 baud, N81. Typea few characters and observe characters echoed to terminal.Troubleshooting information:The QUART is U28. Its four serial ports are used for BSL0, BSL1, QUART PORT C,and QUART PORT D. If the other ports are working, the problem may be in the RS232converter U36. RS232 level input comes on the Controller board at J7-A25, is fed toU36-8, converted to 3.3V levels at U36-21, to the QUART U28-25. The QUART shouldecho the characters out of TXC, U28-26, to U36-24, and it should appear at RS232 levelsat U36-5 and J7-A26.9.4.3.16 TEST SERIAL PORT QUART DProcedure:Connect terminal to J14D on the rear of the shelf. Set terminal for 9600 baud, N81. Typea few characters and observe characters echoed to terminal.

TROUBLESHOOTINGMM101271V1 R2A 71Troubleshooting information:The receive path is J7-A27 to U36-9 at RS232 level, out U36-20 at 3.3V level, toQUART U28-27, echoed out U28-28 to U36-23, and out U36-6 to J7-A28 at RS232level.9.4.3.17 BSL TESTProcedure:Loop BSL0 to BSL1 and run FactoryTest test 11, subtest 1.Troubleshooting information:+12V must be present for the BSL circuits. Two separate tests are run; first BSL0 toBSL1 then BSL1 to BSL0.Two ports of QUART U28 are used. Port A receives and transmits on BSL0. Port Breceives and transmits on BSL1.The path for the first test begins at QUART TXDA U28-6. This is inverted in U35Awhich drives FET driver Q4. BSL0 is looped to BSL1 at J4C and J4D on the rear of theshelf, so that signal appears at BSL1 input U23-3. This is inverted twice and converted toa 3.3V level by U23B and Q10, which drives QUART PORT B input U28-14.The path for the second test begins at QUART TXDB U28-15. This is inverted in U35B,which drives FET driver Q3. BSL1 is looped to BSL0 at J4C and J4D on the rear of theshelf, so that signal appears at BSL0 input U23-1. This is inverted twice and converted toa 3.3V level by U23A and Q9, which drives QUART PORT A input U28-5.9.4.3.18 TEST SCC2Procedure:Connect terminal to J14F on rear of shelf. Set terminal for 38.4kbd, N81. Type a fewcharacters and observe characters echoed to terminal.Troubleshooting information:This is a normal serial port of the 860 processor. The card edge interface is RS232, whichis converted to 3.3V levels to the processor. SCC2RX comes in to the Controller Boardon J7-A19. This RS232 signal comes in to U24-7, gets converted to 3.3V levels at U24-16 and goes to SCC2RX on U1 (not accessible).The 860 processor U1 (not accessible) echoes characters out SCC2TX at 3.3V level anddrives RS232 converter U24-13. U24-10 drives out to the card edge (J7-A20) at RS232levels.9.4.3.19 TEST SCC3Procedure:Connect terminal to J14G on rear of shelf. Set terminal for 38.4kbd, N81. Type a fewcharacters and observe characters echoed to terminal.Troubleshooting information:This is a normal serial port of the 860 processor. The card edge interface is RS232, whichis converted to 3.3V levels to the processor. SCC3RX comes in to the Controller Board

TROUBLESHOOTING72 MM101271V1 R2Aon J7-A21. This RS232 signal comes in to U24-6, gets converted to 3.3V levels at U24-17 and goes to SCC3RX on U1 (not accessible).The 860 processor U1 (not accessible) echoes characters out SCC3TX at 3.3V level anddrives RS232 converter U24-14. U24-9 drives out to the card edge (J7-A22) at RS232levels.9.4.3.20 TEST SMC2Procedure:Connect terminal to J14H on rear of shelf. Set terminal for 38.4kbd, N81. Type a fewcharacters and observe characters echoed to terminal.Troubleshooting information:This is a normal serial port of the 860 processor. The card edge interface is RS232, whichis converted to 3.3V levels to the processor. SMC2TX originates from U1 (notaccessible) at 3.3V level and drives RS232 converter U24-12. U24-11 drives out to thecard edge at RS232 levels. The fixture loops TX to RX so the RS232 signal comes backinto U24-8, gets converted to 3.3V levels at U24-15 and goes to SCC3RX on U1 (notaccessible).This is a normal serial port of the 860 processor. The card edge interface is RS232, whichis converted to 3.3V levels to the processor. SMC2RX comes in to the Controller Boardon J7-A17. This RS232 signal comes in to U24-8, gets converted to 3.3V levels at U24-15 and goes to SMC2RX on U1 (not accessible).The 860 processor U1 (not accessible) echoes characters out SMC2TX at 3.3V level anddrives RS232 converter U24-12. U24-11 drives out to the card edge (J7-A18) at RS232levels.9.4.3.21 I/O OUTPUTS TEST - GROUP AProcedure:To test each output, the FactoryTest Manual Mode Command is given to cause themonitor point to go high or low. Connect a 10K pullup resistor from the monitor point to5V in order to see the result. J11 is on the rear of the shelf.Table 24 - FactoryTest Manual Mode CommandsSIGNALNAME10KPULLUPREQUIREDCOMMANDHIGHCOMMANDLOWMONITORPOINTCPPTOUT yes W stn_ctrl 0x00 W stn_ctrl 0xFF J11-6TXCGDIS yes W stn_ctrl 0x00 W stn_ctrl 0xFF J11-7RPT_INH yes W stn_ctrl 0x00 W stn_ctrl 0xFF J11-3RPTKEY yes W stn_ctrl 0x00 W stn_ctrl 0xFF J11-5SPARE1 yes W stn_ctrl 0x00 W stn_ctrl 0xFF J11-1SPARE2 yes W stn_ctrl 0x00 W stn_ctrl 0xFF J11-2

TROUBLESHOOTINGMM101271V1 R2A 73Troubleshooting information:Each output in Group A is written to a PLD register by the 860 processor. Its path to thecard edge is shown below. They all come out of the PLD, are buffered and go to a pin onJ7.Table 25 - I/O Output Group A PathsI/O OUTPUTS GROUP A PATHSSIGNAL NAME PLD PIN BUFFER IN BUFFER OUT J7 PINCPPTOUT 28 U34-1 U34-2 J7-B13TXCGDIS 70 U34-11 U34-10 J7-B2RPT_INH 103 U34-9 U34-8 J7-A13RPTKEY 111 U33-11 U33-10 J7-B10SPARE1 100 U34-3 U34-4 J7-A7SPARE2 101 U33-13 U33-12 J7-A109.4.3.22 I/O OUTPUTS TEST - GROUP BProcedure:To test each output, the FactoryTest Manual Mode Command is given to cause themonitor point to go high or low. Some outputs will require a 10K pullup resistor to 5V tobe seen.Table 26 - FactoryTest Manual Mode Commands (Group B)SIGNAL NAME 10KPULLUPREQUIREDCOMMANDHIGHCOMMANDLOWMONITORPOINTSYNTH_CLK yes W synth_ctrl 0x00 W synth_ctrl 0xFF J12-13SYNTH_DATA no W synth_ctrl 0x00 W synth_ctrl 0xFF J12-14SYNTH_LD_EN yes W synth_ctrl 0x00 W synth_ctrl 0xFF J12-15EMSQTOAV no W voter_ctrl 0xFF W voter_ctrl 0x00 J12-17RX_MUTE no W rx_ctrl 0x00 W rx_ctrl 0xFF J12-11REMRPT yes W rx_ctrl 0x00 W rx_ctrl 0xFF J12-3SYNTH_DATA is internally pulled to +12V.With no load, EMSQTOAV will pull up to +12V.RX_MUTE will pull to +8V.Troubleshooting information:Each output in Group B is written to a PLD register by the 860 processor. Its path to thecard edge is shown below. They all come out of the PLD, are buffered and inverted andgo to a pin on J7.

TROUBLESHOOTING74 MM101271V1 R2ATable 27 - I/O Outputs Group B PathsI/O OUTPUTS GROUP B PATHSSIGNAL NAME PLD PIN BUFFER IN BUFFER OUT J7 PINSYNTH_CLK 87 U33-5 U33-6 J7-C4SYNTH_DATA 88 U33-3 U33-4 J7-C5SYNTH_LD_EN 102 U35-13 U35-12 J7-C6EMSQTOAV 97 U35-5 U35-6 J7-C3RX_MUTE 112 U33-9 U33-8 J7-B9REMRPT 96 U35-11 U35-10 J7-B6Note that EMSQTOAV goes through an additional transistor Q8.Note that RX_MUTE goes through an additional transistor Q1.9.4.3.23 I/O OUTPUTS TEST - GROUP CProcedure:To test each output, the FactoryTest Manual Mode Command is given to cause themonitor point to go high or low. Some outputs will require a 10K pullup resistor to 5V tobe seen.Table 28 - FactoryTest Manual Mode Commands (Group C)SIGNALNAME10KPULLUPREQUIREDCOMMANDHIGHCOMMANDLOWMONITORPOINTSTNPTT Yes W rx_ctrl 0x00 W rx_ctrl 0x0C J12-2A/DMODCTL No W rx_ctrl 0x00 W rx_ctrl 0x0C J12-4Troubleshooting information:Each output in Group C is written to a PLD register by the 860 processor. Its path to thecard edge is shown below. They both come out of the PLD, are buffered and inverted andgo to a pin on J7.Table 29 - I/O Outputs Group C PathsI/O OUTPUTS GROUP C PATHSSIGNAL NAME PLD PIN BUFFER IN BUFFER OUT J7 PINSTNPTT 71 U34-5 U34-6 J7-A14A/DMODCTL 72 U29-11 U29-10 J7-A16

TROUBLESHOOTINGMM101271V1 R2A 759.4.3.24 I/O INPUTS TEST - GROUP AProcedure:To test inputs, it is necessary to apply 5V (through a 10K resistor) or ground to the inputpoint. Then execute a FactoryTest Command Mode READ command. The table showsthe command and expected result for both 5V input and ground input. The READcommand presents values in hex. Convert the hex to binary to see the individual bits. ‘x’means ‘don’t care’Table 30 - FactoryTest Command Mode READ CommandsSIGNAL NAME INPUTPOINTCOMMAND 5VRESULTGROUNDRESULTSYNTH_LOCK_DET J12-12 R portb all xxxxxxx0 xxxxxxx1SIMULCAST_INH J12-18 R portb all xxxxxx0x xxxxxx1xREM_AUDIO_PRESENT J12-10 R portb all xxxxx0xx xxxxx1xxPAFAIL J12-6 R portb all xxxx0xxx xxxx1xxxRUSIN J12-9 R portb all xxx0xxxx xxx1xxxxBYPASS J13-20 R portb all 0xxxxxxx 1xxxxxxxThe relays on the Analog board will operate when BYPASS is grounded.Troubleshooting information:Each of the signals in Inputs Group A originates off board as a TTL level signal, thengoes through a buffer and then to the PLD U27. The PLD interfaces to the 860 via theprocessor bus. Levels into the PLD are 0 and 5V.Table 31 - Group A I/O Input PathsI/O INPUTS GROUP A PATHSSIGNAL NAME J7 PIN BUFFERINBUFFEROUTPLD PINSYNTH_LOCK_DET J7-C7 U23-9 U23-8 118SIMULCAST_INH J7-B12 U23-11 U23-10 117REM_AUDIO_PRESENT J7-B14 U18-1 U18-2 109PAFAIL J7-B4 U18-11 U18-10 78RUSIN J7-B8 U29-1 U29-2 75BYPASS J7-B5 U23-13 U23-12 1169.4.3.25 I/O INPUTS TEST - GROUP BProcedure:To test inputs, it is necessary to apply 5V ( in some cases, open) then ground to the inputpoint and then execute some FactoryTest manual mode commands. Results forEXTPTTIN, EXTADIN, and EXT150IN are voltages measured on the given pin. Results

TROUBLESHOOTING76 MM101271V1 R2Afor the other 3 inputs are read by the software by executing a FactoryTest CommandMode READ command. The table shows the commands and expected result for both 5Vinput and ground input.Table 32 - READ Commands and Expected ResultsSIGNAL NAME INPUTPOINTCOMMAND MONITORPOINT5VRESULTGROUNDRESULTEXTPTTIN J13-6 W pld_ctrl 0x00W rx_ctrl 0x80J12-2Requires pullup5Vsee note 10VEXTADIN J13-5 W pld_ctrl 0x00W rx_ctrl 0x80J12-4 5Vsee note 10VEXT150IN See note 2 W pld_ctrl 0x00W rx_ctrl 0x80J7-C9(Lsdout)5V 0VRCVNG_FROM_AV J7-C2 R voter_input all - Xxxxxxx0 Xxxxxxx1CAS J11-8 R voter_input all - Xxx0xxxx Xxx1xxxxCGMON J11-4 R voter_input all - Xx0xxxxx Xx1xxxxx1. For EXTPTTIN and EXTADIN, just leave input open for’5V’ result.2. For EXT150IN, for ‘5V result’, apply ground to J13-15 and 5V through a 10Kresistor to J13-16. For ‘Ground Result’, swap inputs.3. RCVNG_FROM_AV is not used in the shelf. Apply inputs to the card connector J7.Troubleshooting information:Each input in Group B originates externally as a TTL level signal. It is buffered andinverted and fed into the PLD. There, it can be read by the 860 processor. Its path fromthe card edge to the PLD is shown below.Table 33 - I/O Input Group B PathsI/O INPUTS GROUP B PATHSSIGNAL NAME ORIGIN BUFFERINBUFFEROUTPLD PINEXTPTTIN J7-C11 U22-3 U22-4 67EXTADIN J7-C12 U22-5 U22-6 60EXT150IN J7-C13 U22-9 U22-8 68RCVNG_FROM_AV J7-C2 U23-5 U23-6 119CAS J7-B7 U18-3 U18-4 108CGMON J7-B3 U18-5 U18-6 1079.4.3.26 TEST PLRTS AND PLCTS, VDIRTS AND VDICTSProcedure:Jumper PLRTS to PLCTS, J14A-6 to J14A-7 on the shelf rear.

TROUBLESHOOTINGMM101271V1 R2A 77Jumper VDIRTS to VDICTS, J14B-6 to J14B-7 on the shelf rear.Then execute FactoryTest test 16.Troubleshooting information:Upon command of the 860 processor, PLRTS is generated in the PLD and exits U27-65.It is buffered, inverted and converted to RS232 levels by U13, entering U13-11, exitingU13-14. It exits the board on J7-B18.PLRTS is looped back to the Controller board into PLCTS on J7-B17. It is converted toTTL, buffered and inverted by U13, entering U13-13 and exiting U13-12. It enters thePLD on U27-83 where it can be read by the 860 processor.Upon command of the 860 processor, VDIRTS is generated in the PLD and exits U27-63.It is buffered, inverted and converted to RS232 levels by U13, entering U13-10, exitingU13-7. It exits the board on J7-C18.VDIRTS is looped back to the Controller board into VDICTS on J7-C17. It is convertedto TTL, buffered and inverted by U13, entering U13-8 and exiting U13-9. It enters thePLD on U27-82 where it can be read by the 860 processor.9.4.3.27 PHASE LOCKED LOOP TEST AND TXC_MISSING_ALARM TESTProcedure:Use a Function Generator to produce a 0V to 5V 9600Hz square wave. Apply this acrossJ13-13 & 14 (9.6REF+ and -), with the ground side connected to J13-14.Execute FactoryTest test 14, subtest 1. Ignore the first line of the on screen instructionssince the input is applied differently. Use a dual trace scope as described to check for twosignals in phase. RFTXCLK is also seen at J11-14.Troubleshooting information:This test uses PLL IC U16 to phase lock the RFTXCLK used by the RF Modem U9 onthe SitePro Modem Board to an external reference signal 9.6REFIN. The PLL chipgenerates an 11.0592 MHz clock slaved to the external reference. In the PLD, this clockis switched to the Modem board instead of the 11.0592 MHz. oscillator clock. ModemBoard IC U9 divides the 11.0592 MHz back down to 9.6kHz (RFTXCLK) which isphased locked by the PLL U16. Both the reference and the feedback signals are switchedto the PLL inside the PLD.A Modem board must be present for this test and it must not be held reset. The Modemboard is normally held reset by the Controller until it is explicitly unreset. It can beunreset by loading code such as SIMON to it. It can also be unreset by executing FactoryTest 4, subtest 3, (Test Dual Port RAM).9.6REFIN enters the Controller board at TTL levels on J7-C15. It is buffered andinverted by U22F, entering in U22-13, exiting on U22-12. It enters the PLD on U27-69.RFTXCLK is derived from the 11.0592 MHz clock on the Modem Board by U9, exitingon U9-27. It is routed to the Controller board through J2-8 (Modem board) whichconnects to Controller Board J2-8. It enters the PLD on U27-128.If the loop fails to lock, one or both signals 9.6REFIN or RFTXCLK may not be gettingto the PLL U16. U16 or some of the associated components may be wrong, misoriented

TROUBLESHOOTING78 MM101271V1 R2Aor missing. Use a known good Modem board. Check for 11.0592 MHz clock at ModemBoard U9-16.Procedure:Instead of following the on screen directions, observe TXC_MISSING_ALARM at J13-18. The test requires an external pullup resistor.Remove the 9.6REF signal. TXC_MISSING_ALARM should go high.Troubleshooting information:TXC_MISSING_ALARM is generated inside the PLD if 9.6REFIN is missing.9.6REFIN must get to the PLD via the path described above. TheTXC_MISSING_ALARM signal exits the PLD on U27-62. It is buffered and inverted byU35D, entering on U35-9, exiting U35-8.9.4.3.28 TEST PLTXCLKProcedure:Observe PLTXCLK (9600Hz, RS232) at J14A-4 on the rear of the shelf.Troubleshooting information:PLTXCLK is generated on the Modem Board at U10-27, and is inverted by U24 beforeexiting the Modem Board on J2-28. It enters the PLD on U27-32. It is also buffered,inverted, and converted to RS232 levels by U30, entering at U30-6, exiting U30-3. Itexits the Controller Board on J7-B20.A working Modem board must be present and not reset for this test.9.4.3.29 TEST VDITXCLKProcedure:Observe VDITXCLK (9600Hz, RS232) at J14B-4 on the rear of the shelf.Troubleshooting information:This test checks the path of VDITXCLK. It is generated on the Modem Board at U11-27,and is inverted by U25 before exiting the Modem Board on J2-11. It is buffered, inverted,and converted to RS232 levels by U30, entering at U30-21, exiting U30-28. It exits theController Board on J7-C20.A working Modem board must be present and not reset for this test.9.4.3.30 FSL OUTPUT TESTProcedure:Execute FactoryTest test 15Observe the FSL output at J4C-4 on the rear of the shelf.Troubleshooting information:The FSL signal is a series of negative going 12V to 0V pulses occurring every 30ms and2.5ms wide.The FSL output signal is generated in the PLD using RFTXCLK (tested above) from the

TROUBLESHOOTINGMM101271V1 R2A 79Modem Board. A working Modem board must be present and not reset for this test.The FSL signal exits the PLD at U27-113. It is buffered and inverted by U33, entering atU33-1, exiting U33-2 which drives FET driver Q2. The FET drives a +12V to 0V signalto J7-C30. The FSL output is capable of driving a 50 ohm load resistor pulled to +12V.9.4.3.31 EEPROM VERIFY TESTProcedure:After turning power off for a few seconds, then back on, execute FactoryTest test 8,subtest 2.Troubleshooting information:If other I2C devices (LEDs, dipswitch) are working, failure of this test indicates aproblem with U14. This test is run after power is turned off and back on. FactoryTest test8, subtest 1 must have been run previously. The EEPROM should retain its data withpower off.9.4.4 Analog BoardThis guide assumes the Analog board is in a SitePro shelf on a bench, not connected to astation, but with +13.8VDC power applied to J7 of the shelf. It is also assumed that‘FactoryTest’ software resides on the Controller board to provide control of the Analogboard. Modem board test program ‘SIMON’ is also needed for some of the tests. TwoTerminal emulators are needed. See shelf test.This is not a detailed test procedure. It is intended for use in service shops by technicianshaving a high degree of expertise in troubleshooting electronic circuitry.9.4.4.1 REFERENCE DOCUMENTSWD-CB101070V1 - Schematic DiagramTS-CB101070V1 - Test SpecAD-CB101070V1 - Assembly DrawingBlock diagram of Analog Board (Figure 11 - Analog Board Block Diagram)9.4.4.2 TEST 2 - VOLTAGESMeasure +5V at C54(+). Measure +12V at C57(+). Measure –12V at C59(-). Measure –5V at TP31.If -5V is wrong voltage or missing, check U2.9.4.4.3 TEST 3 - CLOCK FREQUENCYClocks are derived from a 400kHz oscillator Y1, U32C and U32D. Check for 400 kHz atTP10. U3 divides the 400 kHz down to 25 kHz at TP11 and 3.125 kHz at TP12.9.4.4.4 TEST 4 - SLICERInput signal, 1000Hz sine wave at 1VPP, is applied to VOLSQHI and is buffered byU15A. The same signal should be seen at TP13. The signal is then sliced by comparatorU33A and a squared wave (0 to 5V) should be seen at RFRXDAT. Bias on U33-2 isaround 2.5V. Problems with U31 can affect the bias.

TROUBLESHOOTING80 MM101271V1 R2A9.4.4.5 TEST 5 - LOW SPEED DECODE FILTERSine wave input 100Hz at 1VPP at VOLSQHI is buffered by U15A (seen at TP13),amplified about 2:1 in U15B (seen at TP15), passes through high pass filter U16 (seen atTP16), then through low pass filter U14 (seen at TP17), through amplifier (gain = 2)U28A (seen at TP18). The frequency response is measured at TP18 before going tononlinear circuits. U12B is a slicer, which converts the waveform to a square signal atTP14. Q1 interfaces the squared waveform to a microprocessor on another board. Notethat a 10K pullup to +5V is needed on LSIN to see the 0 to 5V output. This resistor is onthe Controller board.The LS Decode filter frequency response (shown below) is entirely determined by U16(rolloff below 50Hz) and U14 (rolloff above 250Hz).Frequency Output100 Hz 0 db (ref)50 Hz -3 db ± 1db18 Hz -35 db ±- 3db250 Hz -0 db ±- 1db300 Hz <-40dbWith 1V P-P 100Hz in to VOLSQHI, the levels at various test points are shown in thetable below.Table 34 - Test Point LevelsTEST POINT VOLTAGE SIGNAL TYPETP13 1 V P-P (2.5VDC bias) SineTP15 2.2V P-P SineTP16 2.2V P-P SineTP17 2.2V P-P SineTP18 4.4V P-P SineTP14 12.6 V P-P (+0.6 to –12V) SquaredLSIN w 10K pullup 5V P-P (0 to 5V) Squared9.4.4.6 TEST 6 - LOW SPEED ENCODE FILTERIn the shelf, signals cannot be injected directly to the encode filter. One method ofdriving the filter is to use the shelf EXT 150HZ input. Connect a 100Hz 1Vp-p squarewave signal across 150HZ+ to 150HZ- (J13-15 to 16). Make necessary PLD connectionswith the commands:W PLD_CTRL 0X00W RX_CTRL 0X80Configure the Analog board to use the 150HZ input with the commandsSI2C 4C 01 02WI2C 10 00

TROUBLESHOOTINGMM101271V1 R2A 81150Hz input is selected by mux U22 which is controlled by LSCTL. This signal isderived from I2C I/O expander U4 (TP30) and must be logic 1 (5V) to select the 150HZinput.The signal then passes through amplifier U19A where it is reduced in level by about afactor of 4 as seen at TP23. It then goes through buffer U19B (seen at TP22). Thenthrough low pass filter U20 (seen at TP21) then through final amplifier/buffer U17A.Filtered output is seen at LSDTX.Frequency response at LSDTX is entirely determined by U20 and associated componentsand by the 25kHz clock.Table 35 - Frequency Response at LSDTXFREQUENCY RESPONSE100 Hz (ref) 0 dB200 Hz -3 dB250 Hz -4 dB300 Hz < -40 dBWith 100Hz 5Vp-p square wave into 150HZ input (J1-B19), levels through the circuit areshown in the table below.Table 36 - Circuit LevelsTEST POINT VOLTAGE SIGNAL TYPETP23 1 VP-P SquareTP22 1 VP_P Rounded SquareTP21 1.25VP-P SineLSDTX 4.4VP-P(bias may vary)Sine9.4.4.7 TEST 8 - A/D CONVERTERThe A/D converter U23 is an I2C device with slave address 9E hex. If other I2C devicesare working, then U23 is the only IC involved in this test. Apply DC levels between 0Vand 5V to J12-1 (PA_SENSE) and read appropriate digitized results.SI2C 9E 02 01WI2C 00 01RI2C 00 01 (second byte is the result)9.4.4.8 TEST 10 - 9600 BAUD WIDE BAND HS FILTERWith the Analog board in the shelf, external signals cannot be applied directly to the HighSpeed filter sections. Data can be generated by the RF Modem to produce a signalthrough the filters. If response problems are suspected, inspect for broken, wrong, orunsoldered components around the appropriate section of the ‘Quad Op Amp’ circuitry.The response is entirely determined by this section.

TROUBLESHOOTING82 MM101271V1 R2ATwo terminal emulators are required. Refer to the Shelf test. Load SIMON into theModem Board.Select the filter with I2C commandsSI2C 4C 01 02WI2C 00 00 (for filter 0)WI2C 01 00 (for filter 1) Etc.Set digital pot level with I2C commandsSI2C 50 01 00WI2C A9 50 (for pot level of 50 hex)The command ‘W RX_CTRL 0X00’ may also be needed to set up connections in thePLD.Run the RF BER test as described in the shelf test to produce data through the HighSpeed filters.Data is coupled to RFTXDAT (J1-A10), is buffered by U6A (seen at TP1) then is fed tofive separate filters.One of the filters is selected by mux U7, which is controlled by three I2C select linesHS_FILTER_SEL0, 1, and 2. These three select lines are outputs of I2C I/O expanderU4. The three filter select lines can be seen at TP19, TP24, and TP25. Note that if input6, 7, or 8 is selected, no output will be present.If all three select lines are logic 0, then filter 0 (9600 Baud Wide Band) is selected.The mux output goes to digital pot U8, which is also an I2C device and is set to a valueof 50 (hex) for this test. Signal then passes through amplifier U6B (seen at TP9), thenthrough output mux U9 to output MOD (J1-A12). A scope will show the eye pattern atTP9 or MOD.U9 is controlled by select line MODCTL which is derived from I2C I/O expander U4(TP28). MODCTL = 0 selects the path from the filters. Control of this bit is includedabove in the filter selection command.Typical signal levels are shown below for High Speed data input from the RF Modem.Levels are also shown at TP9 when each of the other four filters is selected.Table 37 - High Speed Data Signal LevelsTEST POINT VOLTAGETP1 5V ppTP9 - filter 0 1.1vrmsMOD 1.1vrmsTP9 - filter 1 0.9vrmsTP9 - filter 2 0.95vrmsTP9 - filter 3 0.8vrmsTP9 - filter 4 0.9vrmsTP9 – filter 5, 6, 7 0

TROUBLESHOOTINGMM101271V1 R2A 839.4.4.9 TEST 11 - 9600 BAUD WIDE BAND ETSI HS FILTERSame as test 10 except filter 1 (9600 Baud Wide Band ETSI) is selected by mux U7.HS_FILTER_SEL0 is logic 1 and the other two are logic 0. See test 10 for levels.9.4.4.10 TEST 12 - 4800 BAUD NARROW BAND HS FILTERSame as test 10 except filter 2 (4800 Baud Narrow Band) is selected by mux U7.HS_FILTER_SEL1 is logic 1 and the other two are logic 0. See test 10 for levels.9.4.4.11 TEST 13 - 4800 BAUD NARROW BAND ETSI HS FILTERSame as test 10 except filter 3 (4800 Baud Narrow Band ETSI) is selected by mux U7.HS_FILTER_SEL2 is logic 0 and the other two are logic 1. See test 10 for levels.9.4.4.12 TEST 14 - 9600 BAUD NARROW BAND HS FILTERSame as test 10 except filter 4 (9600 Baud Narrow Band) is selected by mux U7.HS_FILTER_SEL2 is logic 1 and the other two are logic 0. See test 10 for levels.9.4.4.13 TEST 15 - I2C POTThis test checks I2C pot U8 at various settings. If High Speed filter tests have passed,then U8 is the only IC involved in this test. The path is set up just as in test 10 and severalpot settings are checked at the output MOD. Failure means U8 is not responding to I2Ccommands.I2C commands:SI2C 50 01 00WI2C A9 XX (XX can be from 00 to FF hex)9.4.4.14 TEST 16 - ANALOG AUDIO PATHThis test is similar to test 10 in that the path is set up exactly like test 10 with the sameinput and output. The output mux is then switched to the ANALOG_AUDIO input.SI2C 4C 02 01WI2C 40 00Output at MOD should drop to 0V since it is unconnected. Applying a signal toANALOG_AUDIO (J12-20) should then produce an output at MOD.If tests 10-14 have passed and this test fails, U9 is suspected.9.4.4.15 TEST 17 - RS232 TO RS485 CONVERSION OF PLTXDATNote: The remaining Analog board tests check circuitry that is only used in SimulcastSystems.A 9600 baud RS232 level signal is connected to PLTXDAT in the shelf. U24 converts itto TTL at U24-12. This signal is fed to RS485 converter U25 at U25-1. Connect a 100ohm load across PLTXDAT+ to PLTXDAT-. A differential signal of several volts shouldbe seen across PLTXDAT- to PLTXDAT+ (J13-7 to 8).Generate the data signal with the SIMON commands below after resetting the Modemboard.MDS1BERDE-0=10

TROUBLESHOOTING84 MM101271V1 R2A9.4.4.16 TEST 18 - RS232 TO RS485 CONVERSION OF PLTXCLKIn the shelf, a 9600Hz RS232 level clock is always present at PLTXCLK. U24 converts itto TTL at U24-9. This signal is fed to RS485 converter U25 at U25-7. Connect a 100ohm load across PLTXCLK+ to PLTXCLK-.A differential signal of several volts shouldbe seen across PLTXCLK- to PLTXCLK+ (J13-9 to 10).9.4.4.17 TEST 19 - RS485 TO TTL CONVERSION OF 150HZA 9600Hz differential signal is fed into converter U26 across inputs 150HZ+ and 150Hz-.A single ended TTL level signal should appear at EXT 150 HZ (J1-C20). The differentialoutput of Test 18 is an appropriate input for this test.9.4.4.18 TEST 20 - RS485 TO TTL CONVERSION OF 9.6_DATAA 9600Hz differential signal is fed into converter U26 across inputs 9.6 DATA+ and 9.6DATA-. A single ended TTL level signal should appear at EXT 9.6 DATA (J1-C16). Thedifferential output of Test 18 is an appropriate input for this test.9.4.4.19 TEST 21 - RS485 TO TTL CONVERSION OF 9.6_REFA 9600Hz differential signal is fed into converter U26 across inputs 9.6 REF+ and 9.6REF-. A single ended TTL level signal should appear at EXT 9.6 REF (J1-C12). Thedifferential output of Test 18 is an appropriate input for this test.9.4.4.20 TEST 22 - RELAY CONTINUITYRelay K1 and K2 contacts are checked for continuity in the rest state. Then signalBYPASS is grounded to switch the relays ON and continuity is checked in the ON state.U27 is the driver that switches voltage to the relay coils.With no input connected to BYPASS (J1-C29), continuity should exist between the listedpins. Pins listed are at the Analog Board edge J1. These signals are also present on J13.RX_AUDIO_L to RXV_R (C22 to C23)TX_AUDIO_L to TXV_R (C21 to C24)RX_AUDIO_H to RXV_T (C28 to C25)TX_AUDIO_H to TXV_T (C27 to C26)Ground BYPASS (J1-C29). Continuity should now exist between these listed pins.RX_AUDIO_L to TX_AUDIO_L (C22 to C21)RX_AUDIO_H to TX_AUDIO_H (C28 to C27)

LIGHTNING PROTECTION GROUNDINGMM101271V1 R2A 8510.0 LIGHTNING PROTECTION GROUNDINGMaximum lightning protection is achieved when the SitePro Lightning-ProtectionGrounding Kit 344A4500G2 is installed. This kit is normally installed at the factory forall trunking applications. The following procedure summarizes the installation process.Continued

LIGNTNING PROTECTION GROUNDING86 MM101271V1 R2ANOTEIn order to be effective, the Cabinet Grounding Strap must be strapped to the buildingand/or earth ground.LIGHTING PROTECTION KIT 344A4500G2ITEMNUMBERPART NUMBER DESCRIPTION123 19B209260P1 Terminals: Solderless45 19A116850P10 Wire: Stranded6 344A4060P1 Connector: Split Bolt78 19A700032P7 Washer: M4 InternalTooth9 19A702364P508 Screw, M4 x 810 19J706152P5 Strap: Retention

PARTS LISTMM101271V1 R2A 8711.0 PARTS LISTSitePro Controller SHELF ASSEMBLYEA101209V1SYMBOL PART NUMBER DESCRIPTION1 MA101080V1 Chassis Assembly.2 19A116552P3 Clamp, Cable.3 FM101081V1 Cover.4 19A702381P608 Screw, Thread Form, TORX, M4 x 8mm.5 19A701312P6 Flat washer, M4.6 19A702364P508 Screw, Machine, TORX, M4X8mm.7 19A700032P7 Lock washer, Internal Tooth, M4.8 FM101231V1 Spacer Plate, Shelf Door.9FM101232V1 Lens keeper, Door.10 AG101229V22 EMI Shielding Gasket, 22 Fingers.11 AG101229V5 EMI Shielding Gasket, 5 Fingers.12 AG101230V1 Lens, EMI Shielding.13 19A700032P3 Lock washer, Internal Tooth, M2.5.14 19A700034P3 Nut, M2.5 X 0.45.15 NP101233V1 Rear Label.16 FM101083V1 Support, Front.A1 CB101073V1 INTERCONNECT BOARD- - - - CAPACITORS - - - -C1andC2470pF, 2KV: sim to Arco MC1808X471KN202.- - - - JACKS - - - -J1thruJ3DIN 96_ABC-P: sim to AMP 650895-4.J4 RJ11_MULT (2 x 2): sim Stewart SS-7368H22-NF.J5thruJ6CON10: sim to Stewart SS-7188S-A-NF.J7 19A116659P173 CONN PWR 4-R.J8 19A116659P101 CONN PWR 3-P: sim to Molex 26-60-5030.J9 19A116659P105 CONN RCPT 6: sim to Molex 26-60-5060.J10 19A704852P30 CONN RCPT 4.J11 HEADER 20: sim to AMP 102160-4.J12 CON24: sim to AMP 102160-5.J13 HEADER 26: sim to AMP 102160-6.J14 RJ45_MULT ((2 x 6): sim to Stewart SS-73100-070.

PARTS LIST88 MM101271V1 R2ASYMBOL PART NUMBER DESCRIPTION- - - - RESISTORS - - - -R1thruR4REP_623_642/75 75 Ohms, 1%, 0.63W.- - - - TEST POINTS - - - -TP3thruTP7Test Points: sim to Component Corp. TP-107-01.- - - - Pi FILTERS - - - -U1thruU29Capacitor: 100pF, 100WVDC@125º C, +80%/-20%:sim to Tusonix 4700 006.A2 CB101069V1 CONTROLLER BOARD- - - - BATTERY - - - -BT1 Coin: 3V. 165 mAh: Sim to Panasonic BR2325-1HMor RAYOVAC BR2325T2.- - - - CAPACITORS - - - -C1 RJE584320/1 Tantalum: 1.0µF, 20V ±20%.C2thruC1119A702052P33 Ceramic: 0.1µF, 25V ±10%.C12 RJE584320/1 Tantalum: 1.0µF, 20V ±20%.C13 19A702052P33 Ceramic: 0.1µF, 25V ±10%.C14 Ceramic: 470pF, 2kV ±20%: sim to MURATAGRM432X7R471KAL.C15thruC3019A702052P33 Ceramic: 0.1µF, 25V ±10%.C31 Ceramic: 470pF, 2kV ±20%: sim to MURATAGRM432X7R471KAL.C32thruC3819A702052P33 Ceramic: 0.1µF, 25V ±10%.C39 RJE584320/1 Tantalum: 1.0µF, 20V ±20%.C40andC4119A702052P33 Ceramic: 0.1µF, 25V ±10%.C42 RJE584320/1 Tantalum: 1.0µF, 20V ±20%.

PARTS LISTMM101271V1 R2A 89SYMBOL PART NUMBER DESCRIPTIONC43thruC4519A702052P33 Ceramic: 0.1µF, 25V ±10%.C46 RJE584320/1 Tantalum: 1.0µF, 20V ±20%.C47andC4819A702052P33 Ceramic: 0.1µF, 25V ±10%.C49 19A702061P13 Ceramic: 10pF, 100V ±10%.C50thruC5619A702052P33 Ceramic: 0.1µF, 25V ±10%.C57 RJE5843208/1 Tantalum: 10µF, 16V±20%.C58thruC6219A702052P33 Ceramic: 0.1µF, 25V ±10%.C63 19A702061P13 Ceramic: 10pF, 100V ±10%.C64 19A702052P33 Ceramic: 0.1µF, 25V ±10%.C65 19A702061P61 Ceramic: 100pF, 100V±10%.C66 19A702061P57 82pFC67 19A702052P33 Ceramic: 0.1µF, 25V ±10%.C68 RJC4643033/82 Ceramic: 820pF, 25V±10%.C69thruC7319A702052P33 Ceramic: 0.1µF, 25V ±10%.C74 RJE584320/1 Tantalum: 1.0µF, 20V ±20%.C75thruC9219A702052P33 Ceramic: 0.1µF, 25V ±10%.C93 RJC4643034/1 Ceramic: 0.001µF, 25V ±10%.C94thruC9519A702052P33 Ceramic: 0.1µF, 25V ±10%.C96andC97RJE5843208/1 Tantalum: 10µF, 16V±20%.C98andC9919A702052P33 Ceramic: 0.1µF, 25V ±10%.C100 RJE584320/1 Tantalum: 1.0µF, 20V ±20%.C101thruC10519A702052P33 Ceramic: 0.1µF, 25V ±10%.C106 RJC4643034/1 Ceramic: 0.001µF, 25V ±10%.

PARTS LISTMM101271V1 R2A 91SYMBOL PART NUMBER DESCRIPTIONJ7 DIN96, 32x3, 0.1x0.1 Header: sim to BurndyP196B80P00F0NN9.J8 Telephone jack RJ-11, Rt Angle, non-shielded: sim toAMP 555163-1.J9 Header 22x2: sim to Samtec ASP-67352-01.J10 Header 5x2: sim to AMP 146130-4.- - - - INDUCTOR - - - -L1 39µH ±15%: sim to Panasonic ELJ-FA390JF.- - - - RESISTORS - - - -R1 19A149818P103 Metal Film: 10k Ohms ±5%, 0.1W.R2thruR419A149818P102 Metal Film: 1k Ohms ±5%, 0.1W.R5 19A149818P103 Metal Film: 10k Ohms ±5%, 0.1W.R6thruR819A149818P040 Metal Film: 0 Ohms.R9thruR1319A149818P390 Metal Film: 39 Ohms.R14andR1519A149818P750 Metal Film: 75 Ohms ±5%, 0.1W.R16andR1719A149818P103 Metal Film: 10k Ohms ±5%, 0.1W.R18 19A149818P040 Metal Film: 0 Ohms.R19 19A149818P222 Metal Film: 2.2k Ohms ±5%, 0.1W.R20andR2119A149818P390 Metal Film: 39 OhmsR22 REP623642/499 49.9 Ohms ±1%.R23 19A149818P331 Metal Film: 330 Ohms ±5%, 0.1W.R24 19A149818P152 Metal Film: 1.5k Ohms ±5%, 0.1W.R25 19A149818P102 Metal Film: 1k Ohms ±5%, 0.1W.R26andR2719A149818P390 Metal Film: 39 Ohms.R28andR2919A149818P103 Metal Film: 10k Ohms ±5%, 0.1W.R30andR3119A149818P390 Metal Film: 39 Ohms.

PARTS LIST92 MM101271V1 R2ASYMBOL PART NUMBER DESCRIPTIONR32thruR34REP623642/499 49.9 Ohms ±1%.R35 19A149818P331 Metal Film: 330 Ohms ±5%, 0.1W.R36andR3719A149818P390 Metal Film: 39 Ohms.R38 REP623645/1 10k Ohms ±1%R39 19A149818P103 Metal Film: 10k Ohms ±5%, 0.1W.R40andR4119A149818P750 Metal Film: 75 Ohms ±5%, 0.1W.R42 19A149818P331 Metal Film: 330 Ohms ±5%, 0.1W.R43 (Not Placed)R44 19A149818P103 Metal Film: 10k Ohms ±5%, 0.1W.R45 (Not Placed)R46thruR5019A149818P103 Metal Film: 10k Ohms ±5%, 0.1W.R51 19A149818P390 Metal Film: 39 OhmsR52andR53REP623642/499 49.9 Ohms ±1%.R54 19A149818P331 Metal Film: 330 Ohms ±5%, 0.1W.R55 19A149818P121 Metal Film: 120 Ohms ±5%, 0.1W.R56andR5719A149818P102 Metal Film: 1k Ohms ±5%, 0.1W.R58 19A149818P103 Metal Film: 10k Ohms ±5%, 0.1W.R59 19A149818P121 Metal Film: 120 Ohms ±5%, 0.1W.R60 19A149818P102 Metal Film: 1k Ohms ±5%, 0.1W.R61 19A149818P121 Metal Film: 120 Ohms ±5%, 0.1W.R62andR6319A149818P102 Metal Film: 1k Ohms ±5%, 0.1W.R64andR65REP623642/499 49.9 Ohms ±1%.R66 19A149818P121 Metal Film: 120 Ohms ±5%, 0.1W.R67 19A149818P103 Metal Film: 10k Ohms ±5%, 0.1W.R68andR7019A149818P102 Metal Film: 1k Ohms ±5%, 0.1W.

PARTS LISTMM101271V1 R2A 93SYMBOL PART NUMBER DESCRIPTIONR71andR7219A149818P121 Metal Film: 120 Ohms ±5%, 0.1W.R73andR7419A149818P105 Metal Film: 1 Meg Ohm ±5%, 0.1W.R75 3.01k Ohms ±1%: sim to ROHM MZR03EZHF3101.R76 19A149818P102 Metal Film: 1k Ohms ±5%, 0.1W.R77thruR7919A149818P103 Metal Film: 10k Ohms ±5%, 0.1W.R80 19A149818P333 Metal Film: 33k OhmsR81 19A149818P102 Metal Film: 1k Ohms ±5%, 0.1W.R82 19A149818P390 Metal Film: 39 Ohms.R83 19A149818P102 Metal Film: 1k Ohms ±5%, 0.1W.R84 19A149818P103 Metal Film: 10k Ohms ±5%, 0.1W.R85 REP623645/1 10.0k Ohms ±1%.R86 19A149818P103 Metal Film: 10k Ohms ±5%, 0.1W.R87 19A149818P331 Metal Film: 330 Ohms ±5%, 0.1W.R88 19A149818P103 Metal Film: 10k Ohms ±5%, 0.1W.R89 19A149818P102 Metal Film: 1k Ohms ±5%, 0.1W.R90 19A139818P106 Metal Film: 10 Meg Ohms ±5%, 1/16W.R91thruR9419A149818P103 Metal Film: 10k Ohms ±5%, 0.1W.R95 REP623646/47 470k Ohms ±1%.R96 19A149818P102 Metal Film: 1k Ohms ±5%, 0.1W.R97 19A149818P390 Metal Film: 39 Ohms.R98 19A149818P204 Metal Film: 200k Ohms.R99 (Not Placed)R100thruR11019A149818P103 Metal Film: 10k Ohms ±5%, 0.1W.R111 19A149818P750 Metal Film: 75 Ohms ±5%, 0.1W.R112thruR12219A149818P103 Metal Film: 10k Ohms ±5%, 0.1W.R123 19A149818P390 Metal Film: 39 Ohms.R124thruR13519A149818P103 Metal Film: 10k Ohms ±5%, 0.1W.R136 19A149818P222 Metal Film: 2.2k Ohms ±5%, 0.1W

PARTS LIST94 MM101271V1 R2ASYMBOL PART NUMBER DESCRIPTIONR137thruR13919A149818P103 Metal Film: 10k Ohms ±5%, 0.1W.R140andR14119A149818P511 Metal Film: 510 Ohms.R142andR14319A149818P222 Metal Film: 2.2k Ohms ±5%, 0.1W.R144 19A149818P103 Metal Film: 10k Ohms ±5%, 0.1W.R145 19A149818P511 Metal Film: 510 Ohms.R146 19A149818P103 Metal Film: 10k Ohms ±5%, 0.1W.R147 19A149818P392 Metal Film: 3.9k Ohms.R148 19A149818P103 Metal Film: 10k Ohms ±5%, 0.1W.R149 19A149818P101 Metal Film: 100 Ohms.R150 19A149818P392 Metal Film: 3.9k Ohms.R151andR15219A149818P511 Metal Film: 510 OhmsR153 0.015 Ohms ±1%, 0.5W ±1%: sim to IRC-TT LRC-LRF1206-01-R015-F.R154 19A149818P511 Metal Film: 510 OhmsR155thruR15819A149818P103 Metal Film: 10k Ohms ±5%, 0.1W.R159 19A149818P102 Metal Film: 1k Ohms ±5%, 0.1W.R160 19A149818P392 Metal Film: 3.9k OhmsR161 19A149818P100 Metal Film: 10 Ohms ±5%, 0.1WR162 19A149818P101 Metal Film: 100 Ohms.R163 19A149818P511 Metal Film: 510 Ohms.R164andR16519A149818P102 Metal Film: 1k Ohms ±5%, 0.1W.R166 19A149818P511 Metal Film: 510 Ohms.R167 REP623644/56 5.6k Ohms ±1%, 0.1W.R168 REP623644/2 2.0k Ohms ±1%, 0.1W.R169 19A149818P101 Metal Film: 100 Ohms.R170 19A149818P392 Metal Film: 3.9k Ohms.R171 19A149818P472 Metal Film: 4.7k Ohms ±5%. 0.1W.R172 19A149818P273 Metal Film: 27k OhmsR173 19A149818P222 Metal Film: 2.2k Ohms ±5%, 0.1W.R174 Not Used

PARTS LISTMM101271V1 R2A 95SYMBOL PART NUMBER DESCRIPTIONR175andR17619A149818P103 Metal Film: 10k Ohms ±5%, 0.1W.R177 19A149818P472 Metal Film: 4.7k Ohms ±5%. 0.1W.R178 19A149818P103 Metal Film: 10k Ohms ±5%, 0.1W.R179 19A149818P472 Metal Film: 4.7k Ohms ±5%. 0.1W.R180 19A149818P103 Metal Film: 10k Ohms ±5%, 0.1W.R181 100k Ohms ±5%, 0.1W.R182 Not UsedR183 19A149818P040 Metal Film: 0 Ohms.R184thruR18619A149818P103 Metal Film: 10k Ohms ±5%, 0.1W.R187 19A149818P040 Metal Film: 0 OhmsR188 19A149818P152 Metal Film: 1.5k Ohms ±5%, 0.1W.R189 19A149818P102 Metal Film: 1k Ohms ±5%, 0.1W.R190andR191REP623644/56 5.6k Ohms ±1%, 0.1W.R192 19A149818P333 Metal Film: 33k OhmsR193 19A149818P390 Metal Film: 39 Ohms.R194 (Not placed)R195 19A149818P103 Metal Film: 10k Ohms ±5%, 0.1W.R196andR19719A149818P040 Metal Film: 0 Ohms- - - - RESISTOR NETWORKS - - - -RN1thruRN1510k Ohms, BUS8, ±5%, 0.063W: sim to CTC745C101103JTR.- - - - SWITCHES - - - -S1 PUSHBUTTON, SPST N.O./SPST N.C.: sim toGrayhill 32-01.S2 DIPSWITCH, 8 position: sim to Grayhill 97S08SR.- - - - TEST POINTS - - - -TP1thruTP10SM Test Point Loop – Surface Mount: sim to ADI/SM-TESTPAD/Components-Corporation TP-107-01.- - - - TRANSFORMERS - - - -T1andT21:1, 10/100Mbps: sim to TG110-S05N2.

PARTS LIST96 MM101271V1 R2ASYMBOL PART NUMBER DESCRIPTION- - - - TRANSISTORS - - - -Q1 NPN: Switching: sim to Phillips PMBT3904, SOT23.Q2thruQ4FET: Small-Signal, N-Channel: sim to INFINEON,BSP295.Q5 MOSFET: N-Channel, 5A, 20V: sim to ONSemiconductor, MMSF5N02HD.Q6andQ7NPN: Switching: sim to Phillips PMBT3904, SOT23.Q8 PNP: sim to Motorola, MMBT3906LT1, SOT23.Q9andQ10NPN: Switching: sim to Phillips PMBT3904, SOT23.- - - - INTEGRATED CIRCUITS - - - -U1 Single Buffer with 3-State Output: sim to FairchildNC7SZ125M5, SOT23-5.U2 8M x 16 SDRAM, PC100: sim to MicronMT48LC8M16A2TG-8E, TSOP54.U3 Silicon Serial Number: sim to Dallas, DS2401P,TSOC6.U4 Clock Buffer: sim to Cypress Cy2305SC-1, SOIC8.U5 10/100-TX/FX Ethernet Transceiver: sim to AMDAM79C874VC, TQFP80.U6 Octal Buffer, 3.3V: sim to TI 74LVC244ADB,SSOP20.U7 8M x 16 SDRAM, PC100: sim to MicronMT48LC8M16A2TG-8E, TSOP54.U8 Octal Buffer, 3.3V: sim to TI 74LVC244ADB, SOP20.U9 Microprocessor, 66MHz: sim to Motorola,XPC860PZP66D4, BGA357.U10 SK101412V1 1M x 16/2M x 8 Flash, simultaneous Read/Write(programmed): sim to AMD, AM29DL163DB90E1,TSOP48 (unprogrammed).U11 SK101412V2 1M x 16/2M x 8 Flash, simultaneous Read/Write(programmed): sim to AMD, AM29DL163DB90E1,TSOP48 (unprogrammed).U12 10/100-TX/FX Ethernet Transceiver: sim to AMDAM79C874VC, TQFP80.U13 RS232 Transceiver, 5V, 2-TX, 2-RX: sim to MAXIM,MAX202CSE, SOIC16.U14 2-wire serial 128k (16k x 8) EEPROM, I2C, 3.3V: simto Atmel, AT24C128N-10SC-2.7, SOIC8.U15 I2C Bus 8-bit I/O: sim to Philips, PCF8574T, SOIC16.

PARTS LISTMM101271V1 R2A 97SYMBOL PART NUMBER DESCRIPTIONU16 Phase-Lock-Loop (PLL): sim to TI, 74HCT4046ADB,SSOP20.U17 Single Inverter: sim to Philips, 74HC1G04GW, SOT-353.U18 HEX Buffer: sim to Philips, 74HC14PW, TSSOP14.U19 Octal XCVR, BUS HOLD, 3.3V, sim to Philips,74LVCH245APW, TSSOP20.U20 Single Inverter: sim to Philips, 74HC1G04GW, SOT-353.U21 RS485 Transceiver: sim to TI, 75176BD, SO8.U22andU23HEX Buffer: sim to Philips, 74HC14PW, TSSOP14.U24 RS232 Transceiver, 3V to 5.5V, 3-TX, 5-RX: sim toMAXIM, MAX3241CAI, SSOP28.U25 +5V Regulator, 1.5A: sim to Linear Tech, LT1086CM-3.3, TO263.U26 I2C Bus 8-bit I/O: sim to Philips, PCF8574T, SOIC16.U27 MAX3000A 144 PIN EPLD, sim to Altera,EPM3256ATC144-10, TQFP144.U28 Quad UART (QUART): sim to SC28L194A1BE,TQFP80.U29 HEX Buffer: sim to Philips, 74HCT14PW, TSSOP14.U30 RS232 Transceiver, 5V, 4-TX, 5-RX: sim to MAXIM,MAX213CAI, SSOP28.U31 Reset Supervisor: sim to Dallas, DS1818R-10,SOT23.U32 HEX Buffer: sim to Philips, 74HCT14PW, TSSOP14.U33thruU35HEX Open-Collector Output Drivers: sim to Philips,7406AD, SOIC14.U36 RS232 Transceiver, 3V to 5.5V, 5-TX, 3-RX: sim toMAXIM, MAX3237CAI, SSOP28.U37 Hot Swap Controller: sim to Linear Tech, LTC1422,SOCI8.U38 Single 2-Input NAND Gate: sim to Phillips,74AHC1G00GW, SOT353.U39 Not UsedU40 555 Timer: sim to National, LMC555CM, TO263.U41andU42Single Inverter: sim to Phillips 74AC1G04GW.U43 REAL TIME CLOCK, IND.: sim to Dallas DS1307ZN.

PARTS LIST98 MM101271V1 R2ASYMBOL PART NUMBER DESCRIPTION- - - - OSCILLATORS - - - -Y1 Crystal: 25MHz CLK ±50ppm, 40%/60% duty, 3.3V:sim to Raltron CO4305-25.0000-TRY2 Crystal: 29.4912 MHz CLK ±100ppm, 40%/60%duty, 3.3V: sim to Raltron CO4310-29.4912-TR.Y3 Crystal: 32.786kHz CLK: sim to Raltron RSE-32.768-12.5-H2.Y4 Crystal: 11.0592 MHz CLK ±50ppm, 40%/60% duty,3.3V: sim to Raltron CO4305-11.0592-TR..Y5 Crystal: 32.786kHz CLK: sim to Raltron RSE-32.768-12.5-H2.A2-A1 CB101074V1 SitePro MODEM BOARD- - - - CAPACITORS - - - -C1thruC2RJE 584 3208/1 Tantalum: 10µFC3thruC27RJC 464 3046/1 Ceramic: 0.1µF- - - - CONNECTORS - - - -J1andJ2I/O: QUICC, Edge 22x2: sim to SamtecCLP-122-02-G-D-BEJ3 Diagnostic Connector: sim to Semtec FTSH-110-01-L-DV.- - - - RESISTORS - - - -R1thruR8REP 622 455/1 10k Ohms ±5%, 0.06W.R9 Not Used.R10 REP 622 455/1 10k Ohms ±5%, 0.06W.R11thruR13REP 622 454/1 1k Ohms ±5%, 0.06W.R14 REP 622 453/27 270 Ohms ±5%, 0.06W.R15thruR20REP 622 455/1 10k Ohms ±5%, 0.06W.- - - - INTEGRATED CIRCUITS - - - -U1 Local Microprocessor (socketed): sim to DallasDS80C323QCD.U2 SRAM 64 x 8k: sim to Integrated Circuit DevicesIDT71V124SA20PH.U3 Dual Port RAM: sim to Integrated Circuit DevicesIDT70V05L55PF.

PARTS LISTMM101271V1 R2A 99SYMBOL PART NUMBER DESCRIPTIONU4 SRAM 64 x 8k: sim to Integrated Circuit DevicesIDT71V124SA20PH.U5 Address Decoder: sim to 74LVC138ADB.U6 3.3V - 5V Converter: sim to Integrated CircuitDevices IDT74FCT164245TPA.U7 8-Bit Latch: sim to Philips 74LVC373APWDH.U8 Not Used.U9thruU11ROP 101 688/4C RF/PL/VDI ModemU12 Adder Bus Buffer: sim to Integrated Circuit DevicesIDT74FCT163245APF.U13 Data Bus Buffer: sim to Integrated Circuit DevicesIDT74FCT3245APGU14andU15Not Used.U16 Quad 3-Input NAND Gate: sim to Philips74LVC10APWDH.U17 Quad 2-Input NOR Gate: sim to Philips74LVC02APWDH.U18 Hex Inverter: sim to Philips 74LVC04APWDH.U19 Quad 2-Input NAND Gate: sim to Philips74HC1G00GW.U20thruU22Single Inverter: sim to Philips 74HC1G04GW.U23 Quad 2-Input NAND Gate: sim to Philips74HC1G00GW.U24andU25Single Inverter: sim to Philips 74HC1G04GW.- - - - SOCKET - - - -XU1 RNK 860 12/044 PLCC44- - - - CABLES - - - -W1 CA101211V1 Input To Power Supply.W2 CA101212V1 Output From Power Supply.C87andC88Not Used.C89thruC910.1µF: sim to Panasonic ECJ-1VB1C104KC92 Not Used.

PARTS LIST100 MM101271V1 R2ASYMBOL PART NUMBER DESCRIPTIONC93thruC980.1µF: sim to Panasonic ECJ-1VB1C104KC100thruC1040.1µF: sim to Panasonic ECJ-1VB1C104KC106thruC1110.1µF: sim to Panasonic ECJ-1VB1C104KC112 Not UsedC113thruC1210.1µF: sim to Panasonic ECJ-1VB1C104KC123 4.7pF: sim to Kemet C0603C479K5GACC124andC1250.1µF: sim to Panasonic ECJ-1VB1C104K- - - - DIODES - - - -D1andD2: sim to Motorola BAT54LT1D3andD4Not Used.D5 Dual High Speed: sim to Philips SemiconductorsBAL99.D6thruD9: sim to Motorola BAT54LT1.D10 Not Used.D11andD12Dual High Speed: sim to Philips SemiconductorsBAL99.D13andD14Not Used.D15 : sim to Motorola BAT54LT1.- - - - JACK - - - -J1 DIN96_ABC_R: sim to AMP 536366-5.- - - - RELAYS - - - -K1andK22FORMC: sim to NEC EB2-4.5S.- - - - TRANSISTOR - - - -Q1 NPN: Switching: sim to Motorola MMBT3904LT1.

PARTS LISTMM101271V1 R2A 101SYMBOL PART NUMBER DESCRIPTION- - - - RESISTORS - - - -R1 124k Ohms: sim to Panasonic ERJ-3EKF1243V.R2 Resistor network: SM/RP_EXB-D10C [EXB-D10C/SM]: sim to Panasonic EXB-D10C103J.R3 Not Used.R4 16k Ohms: sim to Panasonic ERJ-3EKF1602V.R5 1.21k Ohms: sim to Panasonic ERJ-3EKF1211V.R6 5.11k Ohms: sim to Panasonic ERJ-3EKF5111V.R7 1k Ohms: sim to Panasonic ERJ-3EKF1001V.R8 16k Ohms: sim to Panasonic ERJ-3EKF1602V.R9 1.21k Ohms: sim to Panasonic ERJ-3EKF1211V.R10 5.11k Ohms: sim to Panasonic ERJ-3EKF5111V.R11 1k Ohms: sim to Panasonic ERJ-3EKF1001V.R12andR13Not Used.R14 31.6k Ohms: sim to Panasonic ERJ-3EKF3162V.R15 0 Ohms: sim to Panasonic ERJ-3EKF0.0V.R16 150k Ohms: sim to Panasonic ERJ-3EKF1503V.R17 100k Ohms: sim to Panasonic ERJ-3EKF1003V.R18 1Meg Ohm: sim to Panasonic ERJ-3EKF1004V.R19 Not Used.R20 1Meg Ohms: sim to Panasonic ERJ-3EKF1004V.R21 0 Ohms: sim to Panasonic ERJ-3EKF0.0V.R22 100k Ohms: sim to Panasonic ERJ-3EKF1003V.R23andR24Not Used.R25 46.4k Ohms: sim to Panasonic ERJ-3EKF4642V.R26 0 Ohms: sim to Panasonic ERJ-3EKF0.0V.R27 100k Ohms: sim to Panasonic ERJ-3EKF1003V.R28 11k Ohms: sim to Panasonic ERJ-3EKF1102V.R29 1.96k Ohms: sim to Panasonic ERJ-3EKF1961V.R30 5.11k Ohms: sim to Panasonic ERJ-3EKF5111V.R31 1.1k Ohms: sim to Panasonic ERJ-3EKF1101V.R32 11k Ohms: sim to Panasonic ERJ-3EKF1102V.R33 1.96k Ohms: sim to Panasonic ERJ-3EKF1961V.R34 5.11k Ohms: sim to Panasonic ERJ-3EKF5111V.R35 1.1k Ohms: sim to Panasonic ERJ-3EKF1101V.R36 470 Ohms: sim to Panasonic ERJ-3EKF4700V.

PARTS LIST102 MM101271V1 R2ASYMBOL PART NUMBER DESCRIPTIONR37andR381Meg Ohms: sim to Panasonic ERJ-3EKF1002V.R39 22.1k Ohms: sim to Panasonic ERJ-3EKF2212V.R40 20K Ohms: sim to Panasonic ERJ-3EKF2002V.R41 22.1k Ohms: sim to Panasonic ERJ-3EKF2212V.R42 Not Used.R43 294k Ohms: sim to Panasonic ERJ-3EKF2943V.R44andR4522.1k Ohms: sim to Panasonic ERJ-3EKF2212V.R46 10k Ohms: sim to Panasonic ERJ-3EKF1002V.R47 10Meg Ohms: sim to Panasonic ERJ-3EKF1005V.R48 Not Used.R49 10k Ohms: sim to Panasonic ERJ-3EKF1002V.R50 68k Ohms: sim to Panasonic ERJ-3EKF6802V.R51 Not Used.R52 100k Ohms: sim to Panasonic ERJ-3EKF1003V.R53 10k Ohms: sim to Panasonic ERJ-3EKF1002V.R54 0 Ohms: sim to Panasonic ERJ-3EKF0.0V.R55 23.7k Ohms: sim to Panasonic ERJ-3EKF2372V.R56andR57Not Used.R58 47k Ohms: sim to Panasonic ERJ-3EKF4702V.R59andR6010k Ohms: sim to Panasonic ERJ-3EKF1002V.R61andR620 Ohms: sim to Panasonic ERJ-3EKF0.0V.R63 20k Ohms: sim to Panasonic ERJ-3EKF2002V.R64 Not Used.R65 60.4k Ohms: sim to Panasonic ERJ-3EKF6042VR66 Not Used.R67 1k Ohms: sim to Panasonic ERJ-3EKF1001V.R68 4.7k Ohms: sim to Panasonic ERJ-3EKF4701V.R69 0 Ohms: sim to Panasonic ERJ-3EKF0.0V.R70 60.4k Ohms: sim to Panasonic ERJ-3EKF6042V.R71 Not Used.R72thruR7422.1k Ohms: sim to Panasonic ERJ-3EKF2212V.

PARTS LISTMM101271V1 R2A 103SYMBOL PART NUMBER DESCRIPTIONR75thruR77Not Used.R78andR7910k Ohms: sim to Panasonic ERJ-3EKF1002V.R80thruR83Not Used.R84 0 Ohms: sim to Panasonic ERJ-3EKF0.0V.R85 Not Used.R86 10k Ohms: sim to Panasonic ERJ-3EKF1002V.R87 18k Ohms: sim to Panasonic ERJ-3EKF1802V.R88 0 Ohms: sim to Panasonic ERJ-3EKF0.0VR89 32.4k Ohms: sim to Panasonic ERJ-3EKF3242V.R90 Not Used.R91 82.5k Ohms: sim to Panasonic ERJ-3EKF8252V.R92 Not Used.R93andR94Not Used.R95 221k Ohms: sim to Panasonic ERJ-3EKF2213V.R96 Not Used.R97 10k Ohms: sim to Panasonic ERJ-3EKF1002V.R98 82.5k Ohms: sim to Panasonic ERJ-3EKF8252V.R99 10k Ohms: sim to Panasonic ERJ-3EKF1002V.R100thruR102Not Used.R103andR1044.7k Ohms: sim to Panasonic ERJ-3EKF4701V.R105thruR108470 Ohms: sim to Panasonic ERJ-3EKF4700V.R109andR111Not Used.R112 4.7k Ohms: sim to Panasonic ERJ-3EKF4701V.R113 10 Ohms ERJ-3EKF10R0V.R114 0 Ohms ERJ-3EKF0.0VR115thruR118Not Used.

PARTS LIST104 MM101271V1 R2ASYMBOL PART NUMBER DESCRIPTIONR119andR1200 Ohms: sim to Panasonic ERJ-3EKF0.0V.R121 20k Ohms: sim to Panasonic ERJ-3EKF2002V.R122 39.2k Ohms: sim to Panasonic ERJ-3EKF3922V.R123andR12451.1K Ohms: sim to Panasonic ERJ-3EKF5112V.R125 39.2k Ohms: sim to Panasonic ERJ-3EKF3922V.R126 332k Ohms: sim to Panasonic ERJ-3EKF3323V.R127 Resistor network: sim to Panasonic EXB-D10C103J.R128thruR1300 Ohms: sim to Panasonic ERJ-3EKF0.0V.R131 10Meg Ohms: sim to Panasonic ERJ-3EKF1005V.R132thruR151Not Used.R152 100k Ohms: sim to Panasonic ERJ-3EKF1003V.R153 10k Ohms: sim to Panasonic ERJ-3EKF1002V.- - - - TEST POINTS - - - -TP32andTP33T POINT R: sim to Components Corp. TP-107-01.- - - - INTEGRATED CIRCUITS - - - -U2 Three-terminal negative fixed voltage (-5V) regulator:sim to Motorola/On Semiconductors, MC79M05BT.U3 Dual 4-Stage Binary Ripple Counter: sim to Motorola,MC74HC393AD.U4 Remote 16-bit I/O Expander: sim to Philips,PCF8575CTS.U5 High slew rate, wide bandwidth, single supplyoperational amplifier: sim to Motorola/OnSemiconductors, MC33074D.U6 High slew rate, wide bandwidth, single supplyoperational amplifier: sim to Motorola/OnSemiconductors: sim to Motorola, MC33072D.U7 Fault-Protected, High-Voltage Single 8-to-1/Dual 4-to-1 Multiplexers: sim to Maxim, MAX4508ESE.U8 Addressable dual digital potentiometer: sim to Dallas,DS1803Z-010.U9 SPST/SPDT Analog Switches: sim to Maxim,DG419DY.

PARTS LISTMM101271V1 R2A 105SYMBOL PART NUMBER DESCRIPTIONU10 High slew rate, wide bandwidth, single supplyoperational amplifier: sim to Motorola/OnSemiconductors: sim to Motorola,: sim to Motorola,MC33074DU11 8th-Order, Low-pass, Switched-Capacitor Filters: simto Maxim, MAX292ESA.U12 Low power dual voltage comparator: sim to Motorola,LM393D.U13 Not Used.U14 8th-Order, Lowpass, Elliptic, Switched-CapacitorFilters: sim to Maxim, MAX294EWE.U15 High slew rate, wide bandwidth, single supplyoperational amplifier: sim to Motorola/OnSemiconductors: sim to Motorola, MC33072D.U16 Quad Low Power RS-232 Driver: sim to Linear Tech,LTC1067IS.U17 High slew rate, wide bandwidth, single supplyoperational amplifier: sim to Motorola/OnSemiconductors: sim to Motorola, MC33072D.U18 SPST/SPDT Analog Switches: sim to Maxim,DG419DY.U19 High slew rate, wide bandwidth, single supplyoperational amplifier: sim to Motorola/OnSemiconductors: sim to Motorola, MC33072D.U20 Low Pass Filter: sim to Maxim, MAX294EWE.U21 Not Used.U22 SPST/SPDT Analog Switches: sim to Maxim,DG419DY.U23 8-Bit A/D and D/A Converter: sim to Philips,PCF8591TD.U24 +5V-Powered, Multi-channel RS-232Drivers/Receivers: sim to Maxim, MAX232AESE.U25 Quad Low Power RS-232 Driver: sim to Linear Tech,LTC4861S.U26 Quad RS-485 Line Receiver: sim to Linear Tech, LTC489IS.U27 Dual Peripheral Drivers: sim to TI, SN75451BDU28 High slew rate, wide bandwidth, single supplyoperational amplifier: sim to Motorola/OnSemiconductors: sim to Motorola, MC33072D.U29andU30Not UsedU31 Fault-protected, high-voltage, Single 4-to-1/Dual 2-to-1 Multiplexers: sim to Maxim MAX4534ESD.

PARTS LIST106 MM101271V1 R2ASYMBOL PART NUMBER DESCRIPTIONU32 Hex Inverter: sim to Motorola MC14069UBDR2U33 Low offset voltage dual comparators: sim to MotorolaLM393D.U34 2-wire serial 128k (16k x 8) EEPROM, I2C, 3.3V: simto Atmel, AT24C128N-10SC-2.7, SOIC8.- - - - CRYSTAL - - - -Y1 400 kHz: sim to STATEK_CX-3V-SMA5 PS-PS101328V1 POWER SUPPLY+5.1V, +12V, -12V: sim to CONDOR DP1719A6 EA101227V1 DISPLAY MODULE1 FM101082V1 Display Cover2 FM101082V2 Spacer Plate.3 AG101230V1 Display Lens.4 FM101082V3 Display Lens Keeper.AR-FM101082V1 Display Mkg Artwork.A6-A1 CB101077V1 Display Board Assembly- - - - CAPACITORS - - - -C1 0.1µF: sim to Panasonic ECJ-1VB1C104K.C2 0.01µF: sim to Panasonic ECJ-1VB1C103K.C3 22µF: sim to Sprague 293D226X9016D2T.C4 0.01µF: sim to Panasonic ECJ-1VB1C103K.C5 0.1µF: sim to Panasonic ECJ-1VB1C104K.- - - - DIODE - - - -D1 POWER ON: sim to LUMEX SSS-LX5093GD-0.150”.- - - - RESISTORS - - - -R1 300 Ohms: sim to Panasonic ERJ-6ENF3010.R2thruR1710k Ohms: sim to Panasonic ERJ-3EKF1002.R18 19.6k Ohms: sim to Panasonic 3EKF1962.R19thruR210 Ohms: sim to PHYCOMP 9C06031AOR00JLHFT.R22 300 Ohms: sim to Panasonic ERJ-6ENF3010.- - - - INTEGRATED CIRCUITS - - - -U1 8-Character smart display: sim to SIEMENSHDSP2112S.U2 Remote 16-bit I/O expander for I2C-bus: sim toPhilips PCF8575TS.A6-W1 CA101222V1 CableA7 RYTUZ 921 01/1 ROCKWELL MODEM ASSEMBLY

IC DATAMM101271V1 R2A 10712.0 IC DATA12.1 CONTROLLER BOARD (A2)U1Single Buffer with 3-State OutputFairchild, NC7SZ125M5, SOT23-5U2, U78M x 16 SDRAM, PC100Micron MT48LC8M16A2TG-8EContinued on next page

IC DATA108 M101271V1 R2AContinued from previous pageU3Silicon Serial NumberDALLAS DS2401P

IC DATAMM101271V1 R2A 109U4Clock BufferCypress CY2305SC-1U5, U1210/100-TX/RX Ethernet TransceiverAMD AM79C874VCContinued on next page

IC DATA110 M101271V1 R2AContinued from pervious pageU6, U8Octal Buffer, 3.3VTI, 74LVC244ADB

IC DATAMM101271V1 R2A 111U9Microprocessor, 66MHzMotorola, XPC860PZP66D4, BGA357

IC DATA112 MM101271V1 R2AU10, U111M x 16/2M x 8 Flash, Simultaneous Read/WriteAMD, AM29DL163DB90E1

IC DATAMM101271V1 R2A 113U13RS232 Transceiver, 5V, 2-TX, 2-RXMAXIM, MAX202CSEU14EEPROM, I2C, 16k x 8, 3.3VAtmel, AT24C128N, SOIC8

IC DATA114 MM101271V1 R2AU15, U26I2C Bus 8-Bit I/OPhilips, PCF8574APIN IDENTIFICATIONSYMBOL PIN DESCRIPTIONA0 1 Address Input 0A1 2 Address Input 1A2 3 Address Input 2P0 4 Quasi-bidrectional I/O 0P1 5 Quasi-bidrectional I/O 1P2 6 Quasi-bidrectional I/O 2P3 7 Quasi-bidrectional I/O 3Vss 8 Supply GroundP4 9 Quasi-bidrectional I/O 4P5 10 Quasi-bidrectional I/O 5P6 11 Quasi-bidrectional I/O 6P7 12 Quasi-bidrectional I/O 7INT 13 Interrupt Output (Active LOW)SCL 14 Serial Clock LineSDA 15 Serial Data LineVDD 16 Supply Voltage

IC DATAMM101271V1 R2A 115U16Phase-Lock-Loop (PLL)TI, 74HCT4046ADBU17, U20Single InverterPhilips, 74HC1G04GW

IC DATA116 MM101271V1 R2AU18, U22, U23HEX BufferPhilips, 74HC14PWU19Octal XCVR, BUS HOLD, 3.3VPhilips, 74LVCH245APW

IC DATAMM101271V1 R2A 117U21RS485 TransceiverTI, 75176BDU24RS232 Transceiver, 3V to 5.5V, 3-TX, 5-RXMAXIM, MAX3241CAI, SSOP28

IC DATA118 MM101271V1 R2AU25+5V Regulator, 1.5ALINEAR TECH, LT1086CM-3.3U27144 PIN EPLDALTERA, EPM3256ATC144(Refer to EPLD Drawings)

IC DATAMM101271V1 R2A 119U28QUAD UART (QUART)Philips, SC28L194A1BE

IC DATA120 MM101271V1 R2AU29, U32HEX Buffer(Philips, 74HCT14PWU30RS-232 Transceiver, 5V, 4-TX, 5-TXMAXIM, MAX213CAI

IC DATAMM101271V1 R2A 121U31Reset SupervisorDallas, DS1818R-10U33, U34, U35, U39HEX Open-Collector Output DriversPhilips, 74F06ADU36RS232 Transceiver, 3V to 5.5V, 5-TX, 3-RXMAXIM, MAX3237CAI

IC DATA122 MM101271V1 R2AU37Hot Swap ControllerLinear Tech, LTC1422U38Single NAND GatePhilips, 74AHC1G00GW

IC DATAMM101271V1 R2A 123U40555 TimerNational, LMC555CM

IC DATA124 MM101271V1 R2A12.2 SitePro MODEM BOARD (A2-A1)U1MicroprocessorDallas DS80C323-QCD

IC DATAMM101271V1 R2A 125U2 & U464k x 8 SRAMIDT71V124SA20PHU3Dual Port RAMIDT70V05L55PFContinued

IC DATA126 MM101271V1 R2AContinuedU5Address DecoderPhilips 74ALVC138ADB

IC DATAMM101271V1 R2A 127U63.3V – 5V ConverterIDT74FCT164245TPA

IC DATA128 MM101271V1 R2AU78-Bit LatchPhilips 74LVC373APWDH

IC DATAMM101271V1 R2A 129U9, U10 & U11RF/PL/VDI ModemEricsson ROP 101 688/4CCONNECTIONSTerminal Symbol Function1 RE Read enable (active low)2 EN Chip enable (active low)3 RESOUT Reset output (active high)4 AD0 Bi-directional address/data bus5 AD1 Bi-directional address/data bus6 AD2 Bi-directional address/data bus7 AD3 Bi-directional address/data bus8 AD4 Bi-directional address/data bus9 AD5 Bi-directional address/data bus10 AD6 Bi-directional address/data bus11 AD7 Bi-directional address/data bus12 ALE Address latch enable (active high)13 VSS Ground14 CLK1 Buffered oscillator output15 VDD Power Supply16 XTAL1 Oscillator input17 XTAL2 Oscillator output18 CLK2 640 kHz output19 DRAIN Received data input20 SAT/G1 Received SAT input/G1 enableHC138 (active high)21 TXDAT Transmit data output22 RCVCLK/Q2Recovered clock output/Q2 outputfor HC13823 RCVDAT/Q0Recovered data output/Q0 outputfor HC13824 INT Interrupt request (active low o.d.)25 RESIN Reset input (active high)26 CS Chip select (active low)27 CLK3/4 Transmit clock output/CLK 1/6Output28 WR Write enable (active low)

IC DATA130 MM101271V1 R2AU12Adder Bus BufferIDT74FCT163245APFContinued

IC DATAMM101271V1 R2A 131Continued

IC DATA132 MM101271V1 R2AU13Data Bus BufferIDT74FCT3245APG

IC DATAMM101271V1 R2A 133U16Triple 3-Input NAND GatesPhilips 74LVC10APWDHU17Quad 2-Input NOR GatesPhilips 74LVC02APWDH

IC DATA134 MM101271V1 R2AU18InvertersPhilips 74LVC04APWDHContinuedContinued

IC DATAMM101271V1 R2A 135U192-Input NAND GatePhilips 74AHC1G00GW

IC DATA136 MM101271V1 R2AU20, U21 & U22InverterPhilips 74AHC1G04GW

IC DATAMM101271V1 R2A 13712.3 ANALOG FILTER BOARD (A4)U2Three-Terminal Negative Fixed Voltage RegulatorMotorola, MC79M05BTU3Dual 4-Stage Binary Ripple CounterMotorola, MC74HC393AD

IC DATA138 MM101271V1 R2AU4Remote 16-Bit I/O Expander for I2C-Bus(Philips, PCF8575CTSU5 & U10High Slew Rate, Wide Bandwidth, Single Supply Operational AmplifierMotorola, MC33074DU6, U15, U17, U19 & U28High Slew Rate, Wide Bandwidth, Single Supply Operational AmplifierMotorola, MC33072DU7Fault-Protected, High-Voltage Single 8-to-1/Dual 4-to-1 MultiplexersMaxim, MAX4508ESE

IC DATAMM101271V1 R2A 139U8Addressable Dual Digital PotentionmeterDallas, DS1803Z-010U9, U18 & U22SPST/SPDT Analog SwitchesMaxim, DG419DYU118th-Order, Lowpass, Switched-Capacitor FiltersMaxim, MAX292ESA

IC DATA140 MM101271V1 R2AU12 & U33Low Offset Voltage Dual ComparatorsMotorola, LM393DU14 & U208th-Order, Lowpass, Elliptic, Switched-Capacitor FiltersMaxim, MAX294EWECONNECTIONSPIN NAME FUNCTION1CLKClock input – use internal orexternal clock.2 V- Negative Supply pin.Dual supplies:-2.375V to –5.5V.Single supply: V-= 0V.3OPOUTUncommitted Op-Amp Output4 OP IN Inverting input to theuncommitted op amp. Thenoninverting op amp is internallytied to GND.5 OUT Filter Output6GNDGround. In single-supplyoperation, GND must be biasedto the mid-supply voltage level.7 V+ Positive Supply pin. Dualsupplies: +2.375V to +5.5V.Single supply: +4.75V to +11.0V8 IN Filter Input.

IC DATAMM101271V1 R2A 141U16 & U25Quad Low Power RS-232 DriverLinear Tech, LTC4861SU21High Performance Switched Capacitor Universal FilterLinear Tech, LTC1059SU238-Bit A/D and D/A ConverterPhilips, PCF8591TD

IC DATA142 MM101271V1 R2AU24+5V-Powered, Multi-Channel RS-232 Drivers/ReceiversMaxim, MAX232AESEU26Quad RS-485 Line ReceiverLinear Tech, LTC489SU27Dual Peripheral DriversTI, SN75451BD

IC DATAMM101271V1 R2A 143U31Fault-Protected, High-Voltage, Single 4-to-1/Dual 2-to-1 MultiplexersMaxim, MAX4534ESDU32HEX InverterMotorola, MC14069UBDR2U34EEPROMAtmel AT24C128N-10SC-2.7

IC DATA144 MM101271V1 R2A12.4 DISPLAY MODULE ASSEMBLY (A6)U1Smart LED Display FunctionSiemens HSDP2112S

IC DATAMM101271V1 R2A 145U2Remote 16-bit I/O Expander for I2CPhilips PCF8575TS

146 MM101271V1 R2A(Intentionally Left Blank)

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