Getac Technology T800N RFID and NFC Module User Manual module

Getac Technology Corporation RFID and NFC Module module

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ProductFolderSample &BuyTechnicalDocumentsTools &SoftwareSupport &CommunityReferenceDesignTRF7970ASLOS743K –AUGUST 2011–REVISED APRIL 2014TRF7970A Multiprotocol Fully Integrated 13.56-MHz RFID and Near Field Communication(NFC) Transceiver IC1 Device Overview1.1 Features1• Supports Near Field Communication (NFC) • Programmable Output Power: +20 dBm (100 mW),Standards NFCIP-1 (ISO/IEC 18092) and NFCIPತ2 +23 dBm (200 mW)(ISO/IEC 21481) • Programmable I/O Voltage Levels From 1.8 VDC• Completely Integrated Protocol Handling for to 5.5 VDCISO15693, ISO18000-3, ISO14443A/B, and • Programmable System Clock Frequency OutputFeliCa™ (RF, RF/2, RF/4) from 13.56-MHz or 27.12-MHz• Integrated Encoders, Decoders, and Data Framing Crystal or Oscillatorfor NFC Initiator, Active and Passive Target • Integrated Voltage Regulator Output for OtherOperation for All Three Bit Rates (106 kbps, System Components (MCU, Peripherals,212 kbps, 424 kbps) and Card Emulation Indicators), 20 mA (Max)• RF Field Detector With Programmable Wake-Up • Programmable Modulation DepthLevels for NFC Passive Transponder Emulation • Dual Receiver Architecture With RSSI forOperation Elimination of "Read Holes" and Adjacent Reader• RF Field Detector for NFC Physical Collision System or Ambient In-Band Noise DetectionAvoidance. • Programmable Power Modes for Ultra Low-Power• Integrated State Machine for ISO14443A System Design (Power Down <1 µA)Anticollision (Broken Bytes) Operation • Parallel or SPI Interface (With 127-Byte FIFO)(Transponder Emulation or NFC Passive Target) • Temperature Range: –40°C to 110°C• Input Voltage Range: 2.7 VDC to 5.5 VDC • 32-Pin QFN Package (5 mm x 5 mm)1.2 Applications• Mobile Devices (Tablets, Handsets) • Short-Range Wireless Communication Tasks(Firmware Updates)• Secure Pairing ( Bluetooth®, Wi-Fi®, Other PairedWireless Networks) • Product Identification or Authentication• Public Transport or Event Ticketing • Medical Equipment or Consumables• Passport or Payment (POS) Reader Systems • Access Control, Digital Door Locks• Sharing of Electronic Business Cards1.3 DescriptionThe TRF7970A device is an integrated analog front end and data-framing device for a 13.56-MHz RFIDand Near Field Communication (NFC) system. Built-in programming options make the device suitable for awide range of applications for proximity and vicinity identification systems.The device can perform in one of three modes: RFID and NFC reader, NFC peer, or in card emulationmode. Built-in user-configurable programming options make the device suitable for a wide range ofapplications. The TRF7970A device is configured by selecting the desired protocol in the control registers.Direct access to all control registers allows fine tuning of various reader parameters as needed.Documentation, reference designs, EVM, and source code TI MSP430™ MCUs or ARM®MCUs areavailable.Device InformationPART NUMBER PACKAGE BODY SIZETRF7970ARHB VQFN (32) 5 mm x 5 mm1An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,intellectual property matters and other important disclaimers. PRODUCTION DATA.
MUXRX_IN1RX_IN2PHASE&AMPLITUDEDETECTORGAIN RSSI(AUX)LOGICLEVEL SHIFTERSTATECONTROLLOGIC[CONTROLREGISTERS &COMMANDLOGIC]127-BYTEFIFOMCUINTERFACEVDD_I/OI/O_0I/O_1I/O_2I/O_3I/O_4I/O_5I/O_6I/O_7IRQSYS_CLKDATA _CLKISOPROTOCOLHANDLING DECODERRSSI(EXTERNAL)PHASE&AMPLITUDEDETECTORGAINRSSI(MAIN)FILTER& AGC DIGITIZERBITFRAMINGFRAMINGSERIALCONVERSIONCRC & PARITYTRANSMITTER ANALOGFRONT ENDTX_OUTVDD_PAVSS_PADIGITAL CONTROLSTATE MACHINECRYSTAL OR OSCILLATORTIMING SYSTEMENEN2ASK/OOKMODOSC_INOSC_OUTVOLTAGE SUPPLY REGULATOR SYSTEMS(SUPPLY REGULATORS AND REFERENCE VOLTAGES)VSS_AVSS_RFVDD_RFVDD_XVSS_DVSSVINVDD_ABAND_GAPRF LEVELDETECTORTRF7970ASLOS743K –AUGUST 2011–REVISED APRIL 2014www.ti.com1.4 Functional Block DiagramFigure 1-1 shows the block diagram.Figure 1-1. Block Diagram2Device Overview Copyright © 2011–2014, Texas Instruments IncorporatedSubmit Documentation FeedbackProduct Folder Links: TRF7970A
TRF7970Awww.ti.comSLOS743K –AUGUST 2011–REVISED APRIL 2014Table of Contents1 Device Overview ......................................... 16.8 Transmitter – Digital Section ........................ 286.9 Transmitter – External Power Amplifier and1.1 Features .............................................. 1Subcarrier Detector ................................. 291.2 Applications........................................... 16.10 TRF7970A IC Communication Interface ............ 301.3 Description............................................ 16.11 Special Direct Mode for Improved MIFARE™1.4 Functional Block Diagram ............................ 2Compatibility......................................... 482 Revision History ......................................... 46.12 NFC Modes.......................................... 483 Device Characteristics.................................. 56.13 Direct Commands from MCU to Reader ............ 514 Terminal Configuration and Functions.............. 66.14 Register Description................................. 554.1 Pin Assignments...................................... 67 Application Schematic and Layout4.2 Terminal Functions ................................... 7Considerations.......................................... 755 Specifications ............................................ 97.1 TRF7970A Reader System Using ParallelMicrocontroller Interface............................. 755.1 Absolute Maximum Ratings .......................... 97.2 TRF7970A Reader System Using SPI With SS5.2 Recommended Operating Conditions ................ 9Mode ................................................ 765.3 Electrical Characteristics ............................ 107.3 Layout Considerations .............................. 775.4 Handling Ratings .................................... 117.4 Impedance Matching TX_Out (Pin 5) to 50 ...... 775.5 Thermal Characteristics ............................. 117.5 Reader Antenna Design Guidelines ................ 795.6 Switching Characteristics ........................... 118 Device and Documentation Support ............... 806 Detailed Description ................................... 128.1 Documentation Support ............................. 806.1 Overview ............................................ 128.2 Community Resources .............................. 806.2 System Block Diagram .............................. 158.3 Trademarks.......................................... 806.3 Power Supplies...................................... 158.4 Electrostatic Discharge Caution..................... 806.4 Receiver – Analog Section .......................... 218.5 Glossary ............................................. 806.5 Receiver – Digital Section ........................... 229 Mechanical Packaging and Orderable6.6 Oscillator Section ................................... 27 Information .............................................. 806.7 Transmitter – Analog Section ....................... 28 9.1 Packaging Information .............................. 80Copyright © 2011–2014, Texas Instruments Incorporated Table of Contents 3Submit Documentation FeedbackProduct Folder Links: TRF7970A
TRF7970ASLOS743K –AUGUST 2011–REVISED APRIL 2014www.ti.com2 Revision HistoryNOTE: Page numbers for previous revisions may differ from page numbers in the current version.Changes from Revision J (February 2014) to Revision K Page• Changed Figure 1-1 to show 127-byte FIFO...................................................................................... 2• Moved Section 3 ...................................................................................................................... 5• Changed title of Section 4 .......................................................................................................... 6• Changed title of Section 5 ........................................................................................................... 9• Added ASK/OOK and MOD to VIL and VIH ........................................................................................ 9• Moved Section 5.3 .................................................................................................................. 10• Changed VDD_A TYP value from 3.5 V to 3.4 V ................................................................................. 10• Moved Section 5.4 .................................................................................................................. 11• Added V(ESD) MIN values, test specifications, and notes....................................................................... 11• Changed title of Section 5.5 from Dissipation Ratings to Thermal Characteristics ......................................... 11• Moved Section 5.6 .................................................................................................................. 11• Changed title of Section 6.......................................................................................................... 12• Moved previous Section 3, Device Overview, to Section 6.1.................................................................. 12• Changed from "By default, the AGC is frozen after..." to "By default, the AGC window comparator is set after..." ... 21• Changed from "TX Pulse Length Control register (0x05)" to "TX Pulse Length Control register (0x06)" ............... 28• Changed from "18.8 s" to "18.8 µs" in the sentence that starts with "If the register contains all zeros..."............... 28• Changed Table 6-18 to match Table 6-43 ....................................................................................... 50• Changed command 0x18 to "Test internal RF" ................................................................................. 51• Changed command 0x19 to "Test external RF" ................................................................................ 51• Moved Section 6.14 ................................................................................................................. 55• Changed the sentence that starts "The AGC action is fast..." from "finishes after four subcarrier pulses" to"finishes within eight subcarrier pulses" ......................................................................................... 64• Moved Section 7..................................................................................................................... 75• Deleted previous Section 10, System Design, and moved contents to Section 7.3 through Section 7.5 ............... 77• Removed references to figure numbers in Figure 7-3.......................................................................... 784Revision History Copyright © 2011–2014, Texas Instruments IncorporatedSubmit Documentation FeedbackProduct Folder Links: TRF7970A
TRF7970Awww.ti.comSLOS743K –AUGUST 2011–REVISED APRIL 20143 Device CharacteristicsTable 3-1 shows the supported modes of operation for the TRF7970A device.Table 3-1. Supported Modes of OperationP2P Initiator or Reader/Writer Card Emulation P2P TargetBit rate Bit rate Bit rateTechnology Technology Technology(kbps) (kbps) (kbps)106, 212, 424,NFC-A/B (ISO14443A/B) NFC-A/B 106 NFC-A 106848(1)NFC-F (JIS: X6319-4) 212, 424 N/A N/A NFC-F 212, 424NFC-V (ISO15693) 6.7, 26.7 N/A N/A N/A N/A(1) 848 kbps only applies to reader/writer mode.Copyright © 2011–2014, Texas Instruments Incorporated Device Characteristics 5Submit Documentation FeedbackProduct Folder Links: TRF7970A
VDD_AVINVDD_RFVDD_PATX_OUTVSS_PAVSS_RXRX_IN1I/0_7RX_IN2VSSBGASK/OOKIRQMODVSS_AVDD_I/OPadVDD_XOSC_INOSC_OUTVSS_DENSYS_CLKDATA_CLKEN21234567824232221201918179 10 11 12 13 14 15 1632 31 30 29 28 27 26 25I/0_6I/0_5I/0_4I/0_3I/0_2I/0_1I/0_0TRF7970ASLOS743K –AUGUST 2011–REVISED APRIL 2014www.ti.com4 Terminal Configuration and Functions4.1 Pin AssignmentsFigure 4-1 shows the pin assignments for the 32-pin RHB package.Figure 4-1. 32-Pin RHB Package (Top View)6Terminal Configuration and Functions Copyright © 2011–2014, Texas Instruments IncorporatedSubmit Documentation FeedbackProduct Folder Links: TRF7970A
TRF7970Awww.ti.comSLOS743K –AUGUST 2011–REVISED APRIL 20144.2 Terminal FunctionsTable 4-1 describes the signals.Table 4-1. Terminal FunctionsTERMINAL TYPE (1) DESCRIPTIONNAME NO.VDD_A 1 OUT Internal regulated supply (2.7 V to 3.4 V) for analog circuitryVIN 2 SUP External supply input to chip (2.7 V to 5.5 V)VDD_RF 3 OUT Internal regulated supply (2.7 V to 5 V), normally connected to VDD_PA (pin 4)VDD_PA 4 INP Supply for PA; normally connected externally to VDD_RF (pin 3)TX_OUT 5 OUT RF output (selectable output power, 100 mW or 200 mW, with VDD = 5 V)VSS_PA 6 SUP Negative supply for PA; normally connected to circuit groundVSS_RX 7 SUP Negative supply for RX inputs; normally connected to circuit groundRX_IN1 8 INP Main RX inputRX_IN2 9 INP Auxiliary RX inputVSS 10 SUP Chip substrate groundBAND_GAP 11 OUT Bandgap voltage (VBG = 1.6 V); internal analog voltage referenceSelection between ASK and OOK modulation (0 = ASK, 1 = OOK) for Direct Mode 0 or 1.ASK/OOK 12 BID Can be configured as an output to provide the received analog signal output.IRQ 13 OUT Interrupt requestINP External data modulation input for Direct Mode 0 or 1MOD 14 OUT Subcarrier digital data output (see registers 0x1A and 0x1B)VSS_A 15 SUP Negative supply for internal analog circuits; connected to GNDVDD_I/O 16 INP Supply for I/O communications (1.8 V to VIN) level shifter. VIN should be never exceeded.I/O_0 17 BID I/O pin for parallel communicationI/O_1 18 BID I/O pin for parallel communicationI/O pin for parallel communicationI/O_2 19 BID TX Enable (in Special Direct Mode)I/O pin for parallel communicationI/O_3 20 BID TX Data (in Special Direct Mode)I/O pin for parallel communicationI/O_4 21 BID Slave Select signal in SPI modeI/O pin for parallel communicationI/O_5 22 BID Data clock output in Direct Mode 1 and Special Direct ModeI/O pin for parallel communicationI/O_6 23 BID MISO for serial communication (SPI)Serial bit data output in Direct Mode 1 or subcarrier signal in Direct Mode 0I/O pin for parallel communication.I/O_7 24 BID MOSI for serial communication (SPI)Selection of power down mode. If EN2 is connected to VIN, then VDD_X is active during powerEN2 25 INP down mode 2 (for example, to supply the MCU).DATA_CLK 26 INP Data Clock input for MCU communication (parallel and serial)If EN = 1 (EN2 = don't care) the system clock for MCU is configured. Depending on the crystalthat is used, options are as follows (see register 0x09):SYS_CLK 27 OUT 13.56-MHz crystal: Off, 3.39 MHz, 6.78 MHz, or 13.56 MHz27.12-MHz crystal: Off, 6.78 MHz, 13.56 MHz, or 27.12 MHzIf EN = 0 and EN2 = 1, then system clock is set to 60 kHzEN 28 INP Chip enable input (If EN = 0, then chip is in sleep or power-down mode).VSS_D 29 SUP Negative supply for internal digital circuits(1) SUP = Supply, INP = Input, BID = Bidirectional, OUT = OutputCopyright © 2011–2014, Texas Instruments Incorporated Terminal Configuration and Functions 7Submit Documentation FeedbackProduct Folder Links: TRF7970A
TRF7970ASLOS743K –AUGUST 2011–REVISED APRIL 2014www.ti.comTable 4-1. Terminal Functions (continued)TERMINAL TYPE (1) DESCRIPTIONNAME NO.OSC_OUT 30 OUT Crystal or oscillator outputINP Crystal or oscillator inputOSC_IN 31 OUT Crystal oscillator outputInternally regulated supply (2.7 V to 3.4 V) for digital circuit and external devices (for example,VDD_X 32 OUT MCU)Thermal Pad PAD SUP Chip substrate ground8Terminal Configuration and Functions Copyright © 2011–2014, Texas Instruments IncorporatedSubmit Documentation FeedbackProduct Folder Links: TRF7970A
TRF7970Awww.ti.comSLOS743K –AUGUST 2011–REVISED APRIL 20145 Specifications5.1 Absolute Maximum Ratings (1) (2)over operating free-air temperature range (unless otherwise noted)VIN Input voltage range -0.3 V to 6 VIIN Maximum current VIN 150 mAAny condition 140°CTJMaximum operating virtual junction temperature Continuous operation, long-term reliability (3) 125°C(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratingsonly and functional operation of the device at these or any other conditions beyond those indicated under Operating Conditions are notimplied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.(2) All voltage values are with respect to substrate ground terminal VSS.(3) The maximum junction temperature for continuous operation is limited by package constraints. Operation above this temperature mayresult in reduced reliability or lifetime of the device.5.2 Recommended Operating Conditionsover operating free-air temperature range (unless otherwise noted)MIN TYP MAX UNITVIN Operating input voltage 2.7 5 5.5 VTAOperating ambient temperature -40 25 110 °CTJOperating virtual junction temperature -40 25 125 °CI/O lines, IRQ, SYS_CLK, DATA_CLK, 0.2 xVIL Input voltage - logic low VEN, EN2, ASK/OOK, MOD VDD_I/OI/O lines, IRQ, SYS_CLK, DATA_CLK, 0.8 xVIH Input voltage threshold, logic high VEN, EN2, ASK/OOK, MOD VDD_I/OCopyright © 2011–2014, Texas Instruments Incorporated Specifications 9Submit Documentation FeedbackProduct Folder Links: TRF7970A
TRF7970ASLOS743K –AUGUST 2011–REVISED APRIL 2014www.ti.com5.3 Electrical CharacteristicsTYP operating conditions are TA= 25°C, VIN = 5 V, full-power mode (unless otherwise noted)MIN and MAX operating conditions are over recommended ranges of supply voltage and operating free-air temperature(unless otherwise noted)PARAMETER TEST CONDITIONS MIN TYP MAX UNITAll building blocks disabled, including supply-IPD1 Supply current in Power Down Mode 1 voltage regulators; measured after 500-ms 0.5 5 µAsettling time (EN = 0, EN2 = 0)The SYS_CLK generator and VDD_X remainSupply current in Power Down Mode 2IPD2 active to support external circuitry; measured 120 200 µA(Sleep Mode) after 100-ms settling time (EN = 0, EN2 = 1)Oscillator running, supply-voltage regulators inISTBY Supply current in stand-by mode 1.9 3.5 mAlow-consumption mode (EN = 1, EN2 = x)Supply current without antenna driver Oscillator, regulators, RX and AGC active, TXION1 10.5 14 mAcurrent is offOscillator, regulators, RX and AGC and TXION2 Supply current – TX (half power) 70 78 mAactive, POUT = 100 mWOscillator, regulators, RX and AGC and TXION3 Supply current – TX (full power) 130 150 mAactive, POUT = 200 mWVPOR Power-on reset voltage Input voltage at VIN 1.4 2 2.6 VVBG Bandgap voltage (pin 11) Internal analog reference voltage 1.5 1.6 1.7 VRegulated output voltage for analogVDD_A VIN = 5 V 3.1 3.4 3.8 Vcircuitry (pin 1)VDD_X Regulated supply for external circuitry Output voltage pin 32, VIN = 5 V 3.1 3.4 3.8 VIVDD_Xmax Maximum output current of VDD_X Output current pin 32, VIN = 5 V 20 mAHalf-power mode, VIN = 2.7 V to 5.5 V 8 12RRFOUT Antenna driver output resistance (1) ȍFull-power mode, VIN = 2.7 V to 5.5 V 4 6RRFIN RX_IN1 and RX_IN2 input resistance 4 10 20 kȍMaximum RF input voltage at RX_IN1 andVRF_INmax VRF_INmax should not exceed VIN 3.5 VppRX_IN2fSUBCARRIER= 424 kHz 1.4 2.5Minimum RF input voltage at RX_IN1 andVRF_INmin mVppRX_IN2 (input sensitivity)(2) fSUBCARRIER = 848 kHz 2.1 3fSYS_CLK SYS_CLK frequency In power mode 2, EN = 0, EN2 = 1 25 60 120 kHzfCCarrier frequency Defined by external crystal 13.56 MHzTime until oscillator stable bit is set (registertCRYSTAL Crystal run-in time 3 ms0x0F)(3)Depends on capacitive load on the I/O lines,fD_CLKmax Maximum DATA_CLK frequency(4) 2 8 10 MHzrecommendation is 2 MHz(4)ROUT Output resistance I/O_0 to I/O_7 500 800 ȍRSYS_CLK Output resistance RSYS_CLK 200 400 ȍ(1) Antenna driver output resistance(2) Measured with subcarrier signal at RX_IN1 or RX_IN2 and measured the digital output at MOD pin with register 0x1A bit 6 = 1.(3) Depends on the crystal parameters and components(4) Recommended DATA_CLK speed is 2 MHz. Higher data clock depends on the capacitive load. Maximum SPI clock speed should notexceed 10 MHz. This clock speed is acceptable only when external capacitive load is less than 30 pF. MISO driver has a typical outputresistance of 400 ȍ(12-ns time constant when 30-pF load used).10 Specifications Copyright © 2011–2014, Texas Instruments IncorporatedSubmit Documentation FeedbackProduct Folder Links: TRF7970A
TRF7970Awww.ti.comSLOS743K –AUGUST 2011–REVISED APRIL 20145.4 Handling RatingsMIN MAX UNITTSTG Storage temperature range -55 150 °CV(ESD) Electrostatic discharge Human-Body Model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) -2 2 kVCharged-Device Model (CDM), per JEDEC specification JESD22-C101, -500 500 Vall pins(2)Machine Model (MM) -200 200 V(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Pins listed as 2 kVmay actually have higher performance.(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Pins listed as 500 Vmay actually have higher performance.5.5 Thermal CharacteristicsPOWER RATING(2)PACKAGE șJC șJA(1)TA25°C TA85°CRHB (32 pin) 31°C/W 36.4°C/W 2.7 W 1.1 W(1) This data was taken using the JEDEC standard high-K test PCB.(2) Power rating is determined with a junction temperature of 125°C. This is the point where distortion starts to increase substantially.Thermal management of the final PCB should strive to keep the junction temperature at or below 125°C for best performance and long-term reliability.5.6 Switching CharacteristicsTYP operating conditions are TA= 25°C, VIN = 5 V, full-power mode (unless otherwise noted)MIN and MAX operating conditions are over recommended ranges of supply voltage and operating free-air temperature(unless otherwise noted)PARAMETER TEST CONDITIONS MIN TYP MAX UNITDATA_CLK time high or low, one half oftLO/HI Depends on capacitive load on the I/O lines(1) 250 62.5 50 nsDATA_CLK at 50% duty cycleSlave select lead time, slave select low totSTE,LEAD 200 nsclockSlave select lag time, last clock to slavetSTE,LAG 200 nsselect highSlave select disable time, slave selecttSTE,DIS rising edge to next slave select falling 300 nsedgetSU,SI MOSI input data setup time 15 nstHD,SI MOSI input data hold time 15 nstSU,SO MISO input data setup time 15 nstHD,SO MISO input data hold time 15 nstVALID,SO MISO output data valid time DATA_CLK edge to MISO valid, CL30 pF 30 50 75 ns(1) Recommended DATA_CLK speed is 2 MHz. Higher data clock depends on the capacitive load. Maximum SPI clock speed should notexceed 10 MHz. This clock speed is acceptable only when external capacitive load is less than 30 pF. MISO driver has a typical outputresistance of 400 ȍ(12-ns time constant when 30-pF load used).Copyright © 2011–2014, Texas Instruments Incorporated Specifications 11Submit Documentation FeedbackProduct Folder Links: TRF7970A
Federal Communication Commission Interference Statement This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one of the following measures:  Reorient or relocate the receiving antenna.  Increase the separation between the equipment and receiver.  Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.  Consult the dealer or an experienced radio/TV technician for help. FCC Caution:  Any changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate this equipment.  This transmitter must not be co-located or operating in conjunction with any other antenna or transmitter.
Radiation Exposure Statement: The product is a low power device and its output power is lower than FCC SAR exemption level. This module can be used with Product name: T800. This device is intended only for OEM integrators under the following conditions: 1) The transmitter module may not be co-located with any other transmitter or antenna. The co-transmitting with other radio will need a separate evaluation. 2) Module approval valid only when this module is installed in the tested host “Product name: T800”. As long as 2 conditions above are met, further transmitter test will not be required. However, the OEM integrator is still responsible for testing their end-product for any additional compliance requirements required with this module installed IMPORTANT NOTE: In the event that these conditions cannot be met (for example certain laptop configurations or co-location with another transmitter), then the FCC authorization is no longer considered valid and the FCC ID cannot be used on the final product. In these circumstances, the OEM integrator will be responsible for re-evaluating the end product (including the transmitter) and obtaining a separate FCC authorization. End Product Labeling The final end product must be labeled in a visible area with the following: “Contains FCC ID: QYLT800N”. The grantee's FCC ID can be used only when all FCC compliance requirements are met. Manual Information to the End User The OEM integrator has to be aware not to provide information to the end user regarding how to install or remove this RF module in the user’s manual of the end product which integrates this module. The end user manual shall include all required regulatory information/warning as show in this manual.

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