Cypress Semiconductor 0737 This product is a Bluetooth wireless EZ-BT WICED SIP Module User Manual CYW20732S Bluetooth Low Energy SiP Module

Cypress Semiconductor This product is a Bluetooth wireless EZ-BT WICED SIP Module CYW20732S Bluetooth Low Energy SiP Module

Contents

User Manual_CYW20732S - 0514

Cypress Semiconductor198 Champion CourtSan Jose, CA 95134-1709Phone (USA): 800.858.1810Phone (Intnl): +1.408.943.2600www.cypress.comCYW20732SBluetooth Low Energy SiP ModuleDoc. # 002-15222 Rev. *G
CYW20732S Bluetooth Low Energy SiP Module, Doc. # 002-15222 Rev. *G 2CopyrightsCopyrights© Cypress Semiconductor Corporation, 2013-2017. This document is the property of Cypress Semiconductor Corporationand its subsidiaries, including Spansion LLC ("Cypress"). This document, including any software or firmware included or refer-enced in this document ("Software"), is owned by Cypress under the intellectual property laws and treaties of the UnitedStates and other countries worldwide. Cypress reserves all rights under such laws and treaties and does not, except as spe-cifically stated in this paragraph, grant any license under its patents, copyrights, trademarks, or other intellectual propertyrights. If the Software is not accompanied by a license agreement and you do not otherwise have a written agreement withCypress governing the use of the Software, then Cypress hereby grants you a personal, non-exclusive, nontransferablelicense (without the right to sublicense) (1) under its copyright rights in the Software (a) for Software provided in source codeform, to modify and reproduce the Software solely for use with Cypress hardware products, only internally within your organi-zation, and (b) to distribute the Software in binary code form externally to end users (either directly or indirectly throughresellers and distributors), solely for use on Cypress hardware product units, and (2) under those claims of Cypress's patentsthat are infringed by the Software (as provided by Cypress, unmodified) to make, use, distribute, and import the Softwaresolely for use with Cypress hardware products. Any other use, reproduction, modification, translation, or compilation of theSoftware is prohibited.TO THE EXTENT PERMITTED BY APPLICABLE LAW, CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS ORIMPLIED, WITH REGARD TO THIS DOCUMENT OR ANY SOFTWARE OR ACCOMPANYING HARDWARE, INCLUDING,BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PUR-POSE. To the extent permitted by applicable law, Cypress reserves the right to make changes to this document without fur-ther notice. Cypress does not assume any liability arising out of the application or use of any product or circuit described inthis document. Any information provided in this document, including any sample design information or programming code, isprovided only for reference purposes. It is the responsibility of the user of this document to properly design, program, and testthe functionality and safety of any application made of this information and any resulting product. Cypress products are notdesigned, intended, or authorized for use as critical components in systems designed or intended for the operation of weap-ons, weapons systems, nuclear installations, life-support devices or systems, other medical devices or systems (includingresuscitation equipment and surgical implants), pollution control or hazardous substances management, or other uses wherethe failure of the device or system could cause personal injury, death, or property damage ("Unintended Uses"). A criticalcomponent is any component of a device or system whose failure to perform can be reasonably expected to cause the failureof the device or system, or to affect its safety or effectiveness. Cypress is not liable, in whole or in part, and you shall andhereby do release Cypress from any claim, damage, or other liability arising from or related to all Unintended Uses of Cypressproducts. You shall indemnify and hold Cypress harmless from and against all claims, costs, damages, and other liabilities,including claims for personal injury or death, arising from or related to any Unintended Uses of Cypress products.Cypress, the Cypress logo, Spansion, the Spansion logo, and combinations thereof, WICED, PSoC, CapSense, EZ-USB, F-RAM, and Traveo are trademarks or registered trademarks of Cypress in the United States and other countries. For a morecomplete list of Cypress trademarks, visit cypress.com. Other names and brands may be claimed as property of their respec-tive owners.
3 CYW20732S Bluetooth Low Energy SiP Module, Doc. # 002-15222 Rev. *GPrefaceThis document provides descriptions of the interfaces, pin assignments, and specifications of Cypress CYW20732S Bluetooth Low Energy (BLE) System-in-Package (SiP) module. It is intended for designers who are responsible for adding the CYW20732S module to wireless input devices including heart-rate monitors, blood pressure monitors, proximity sensors, temperature sensors, and battery monitors.Cypress Part Numbering SchemeCypress is converting the acquired IoT part numbers from Broadcom to the Cypress part numbering scheme. Due to this con-version, there is no change in form, fit, or function as a result of offering the device with Cypress part number marking. Thetable provides Cypress ordering part number that matches an existing IoT part number.Acronyms and AbbreviationsIn most cases, acronyms and abbreviations are defined on first use.For a comprehensive list of acronyms and other terms used in Cypress documents, go to http://www.cypress.com/glossary.Document ConventionsThe following conventions may be used in this document:Technical SupportCypress provides a wealth of data at http://www.cypress.com/internet-things-iot to help you to select the right IoT device foryour design, and quickly and effectively integrate the device into your design. Cypress provides customer access to a widerange of information, including technical documentation, schematic diagrams, product bill of materials, PCB layout informa-tion, and software updates. Customers can acquire technical documentation and software from the Cypress Support Commu-nity website (http://community.cypress.com/).Table 2-1.  Mapping Table for Part Number between Broadcom and CypressBroadcom Part Number Cypress Part NumberBCM20732 CYW20732BCM20732S CYW20732SConvention DescriptionBold User input and actions: for example, type exit, click OK, press Alt+CMonospaceCode: #include <iostream>HTML: <td rowspan = 3>Command line commands and parameters: wl [-l] <command>< > Placeholders for required elements: enter your <username> or wl <command>[] Indicates optional command-line parameters: wl [-l]Indicates bit and byte ranges (inclusive): [0:3] or [7:0]
CYW20732S Bluetooth Low Energy SiP Module, Doc. # 002-15222 Rev. *G 4Preface
5 CYW20732S Bluetooth Low Energy SiP Module, Doc. # 002-15222 Rev. *GContents1. Introduction 71.1 Overview...................................................................................................................................71.1.1 Features ........................................................................................................................71.1.2 Application Profiles........................................................................................................71.1.3 Block Diagram...............................................................................................................81.1.4 External Reset...............................................................................................................81.1.5 32.768 kHz Oscillator ....................................................................................................91.2 Pin Map and Signal Descriptions............................................................................................101.3 Electrical Specifications ..........................................................................................................141.4 RF Specifications....................................................................................................................151.5 ADC Specifications .................................................................................................................161.6 Timing and AC Characteristics ...............................................................................................171.6.1 SPI Timing...................................................................................................................171.6.2 BSC Interface Timing ..................................................................................................181.6.3 UART Timing ...............................................................................................................191.7 PCB Design and Manufacturing Recommendations ..............................................................201.7.1 Pad and Solder Mask Opening Dimensions ...............................................................201.7.2 PCB Layout Recommendations for Configuration A ...................................................201.7.3 PCB Layout Recommendations for Configuration B ...................................................231.7.4 Common Guidelines for CYW20732S.........................................................................241.7.5 PCB Stencil .................................................................................................................251.7.6 Solder Reflow..............................................................................................................261.8 Packaging and Storage Information .......................................................................................271.9 Mechanical Information...........................................................................................................291.10 Ordering Information...............................................................................................................31Revision History    33
CYW20732S Bluetooth Low Energy SiP Module, Doc. # 002-15222 Rev. *G 6                                                                                  Contents
7 CYW20732S Bluetooth Low Energy SiP Module, Doc. # 002-15222 Rev. *G1.   Introduction1.1 OverviewThe CYW20732S is a compact, highly-integrated Bluetooth low-energy (BLE) system-in-package (SiP) module. TheCYW20732S SiP includes an embedded BLE antenna, 24 MHz clock, and 512 Kb EEPROM, so only a minimal set of exter-nal components is needed to create a standalone BLE device.The CYW20732S is designed to accelerate time-to-market. The Bluetooth stack and several application profiles are built intothe module, allowing customers to focus on their core applications. To further reduce application development time, theCYW20732S includes integrated software support, with one-click installation of the complete environment and a one-clickcompile/build/link/load cycle. All this, coupled with an ultra-small form factor and support for a wide voltage range, makes theCYW20732S well suited for virtually any Bluetooth Smart application.1.1.1 Features■ARM Cortex-M3 microcontroller unit (MCU)■Embedded 512 Kb EEPROM■Broadcom Serial Control (BSC), SPI, and UART interfaces■FCC and CE compliant■RoHS compliant, certified lead- and halogen-free■Moisture Sensitivity Level (MSL) 3 compliant■6.5 mm × 6.5 mm × 1.2 mm Land Grid Array (LGA) 48-pin package1.1.2 Application ProfilesThe following profiles are supported in CYW20732S ROM:■Battery status■Blood pressure monitor■Find me■Heart rate monitor■Proximity■Thermometer■Weight scale■Time■Blood glucose monitorAdditional profiles that can be supported in CYW20732S RAM include:■Blood glucose monitor■Temperature alarm■Location■Other custom profiles
CYW20732S Bluetooth Low Energy SiP Module, Doc. # 002-15222 Rev. *G 8Introduction1.1.3 Block DiagramA block diagram of the CYW20732S BLE SiP is shown in Figure 1-1.Figure 1-1.  CYW20732S BLE SiP Block Diagram1.1.4 External ResetExternal reset timing for the CYW20732S is illustrated in Figure 1-2.Figure 1-2.  External Reset TimingVBAT/VDDIOCYW20732Bluetooth Low EnergySystem-on-Chip withARM ® Cortex™ M3-basedMicroprocessor CoreAntennaBandpassFilter UARTSPI/I2CInfraredADCGPIOsPWM32.768 kHzOscillator(optional)24 MHzXTALEEPROM512 Kb I2CCYW20732SRESET_NPulsewidth>20µsCrystalEnableBasebandResetStartreadingEEPROMandfirmwarebootCrystalwarm‐updelay:~5ms
9 CYW20732S Bluetooth Low Energy SiP Module, Doc. # 002-15222 Rev. *GIntroduction1.1.5 32.768 kHz OscillatorThe CYW20732S includes a standard Pierce oscillator. The oscillator circuit includes a comparator with hysteresis on the out-put to create a single-ended digital output. The hysteresis eliminates chatter when the input is near the comparator threshold(~100 mV). The oscillator circuit can is designed for a 32 kHz or 32.768 kHz crystal oscillator, and can also be driven by anexternal clock input with a similar frequency. Characteristics for a 32 kHz oscillator are defined in Table 1-1.Table 1-1.  32 kHz Crystal Oscillator CharacteristicsParameter Symbol Conditions Min. Typ. Max. UnitOutput frequency Foscout – – 32.768 – kHzFrequency tolerance Ftol Crystal-dependent – 100 – ppmStart-up time Tstartup – – – 500 µsCrystal drive level Pdrv For crystal selection 0.5 – – µWCrystal series resistance Rseries For crystal selection – – 70 kCrystal shunt capacitance Cshunt For crystal selection – – 1.3 pF
CYW20732S Bluetooth Low Energy SiP Module, Doc. # 002-15222 Rev. *G 10Introduction1.2 Pin Map and Signal DescriptionsThe CYW20732S pin map is shown in Figure 1-3.Figure 1-3.  CYW20732S (TOP View)The signal name, type, and description of each pin in the CYW20732S is listed in Table 1-2. The symbols shown under I/OType indicate pin directions (I/O = bidirectional, I = input, O = output) and the internal pull-up/pull-down characteristics (PU =weak internal pull-up resistor and PD = weak internal pull-down resistor), if any.Table 1-2.  Pin DescriptionsPin Name I/O Type Description1 GPIO: P27PWM1I Default direction: Input.After POR state: Input floating.Drain current: 16 mAAlternate function: MOSI (master and slave) for SPI_22GND GNDGND3 VBAT I Battery supply input.4GND GNDGND5GND GNDGND6GND GNDGND7GND GNDGND8GND GNDGND
11 CYW20732S Bluetooth Low Energy SiP Module, Doc. # 002-15222 Rev. *GIntroduction9GND GNDGND10 Reserved – Leave floating11 GND GND GND12 GND GND GND13 GND GND GND14 GND GND GND15 GND GND GND16 GND GND GND17 GND GND GND18 UART_RX I UART_RX. This pin is pulled low through an internal 10 k resistor.19 UART_TX O, PU UART_TX 20 GND GND GND21 SCL I/O, PU SCL I/O, PU clock signal for an external I2C device22 SDA I/O, PU SDA I/O, PU data signal for an external I2C device23 GND GND GND24 GND GND GND25 GPIO: P1 I Default direction: Input.After POR state: Input floating.This pin is tied to the WP pin of the embedded EEPROM.Requires an external 10K pull-up26 TMC I Test mode control. Pull this pin high to invoke test mode; leave it floating if not used. This pin is connected to GND through an internal 10 k resistor.27 RESET_N I/O PU Active-low system reset with open-drain output28 GPIO: P0 I Default direction: Input.After POR state: Input floating.Alternate functions:■A/D converter input■Peripheral UART TX (PUART_TX)■MOSI (master and slave) for SPI_2■IR_RX■60Hz_main29 GND GND GND30 GPIO: P3 I Default direction: Input.After POR state: Input floating.Alternate functions:■Peripheral UART CTS (PUART_CTS)■SPI_CLK (master and slave) for SPI_231 GPIO: P2 I Default direction: Input.After POR state: Input floating.Alternate functions:■Peripheral UART RX (PUART_RX)■SPI_CS (slave only) for SPI_2■SPI_MOSI (master only) for SPI_2Table 1-2.  Pin Descriptions (continued)Pin Name I/O Type Description
CYW20732S Bluetooth Low Energy SiP Module, Doc. # 002-15222 Rev. *G 12Introduction32 GPIO: P4 I Default direction: Input.After POR state: Input floating.Alternate functions:■Peripheral UART RX (PUART_RX)■MOSI (master and slave) for SPI_2.■IR_TX33 GPIO: P8 I Default direction: Input.After POR state: Input floating.Alternate functions: A/D converter input 34 GPIO: P33 I Default direction: Input.After POR state: Input floating.Alternate functions:■A/D converter input ■MOSI (slave only) for SPI_2■Auxiliary clock output (ACLK1)■Peripheral UART RX (PUART_RX)35 GPIO: P32 I Default direction: Input.After POR state: Input floating.Alternate functions:■A/D converter input■SPI_CS (slave only) for SPI_2.■Auxiliary clock output (ACLK0)■Peripheral UART TX (PUART_TX)36 GPIO: P25 I Default direction: Input.After POR state: Input floating.Alternate functions:■MISO (master and slave) for SPI_2■Peripheral UART RX (PUART_RX)37 GPIO: P24 I Default direction: Input.After POR state: Input floating.Alternate functions:■SPI_CLK (master and slave) for SPI_2■Peripheral UART TX (PUART_TX)38 N/C N/C N/C39 GPIO: P13PWM3I Default Direction: InputAfter POR State: Input FloatingDrain current: 16 mAAlternate function: A/D converter inputGPIO: P28PWM2I Default direction: Input.After POR state: Input floating.Drain current: 16 mAAlternate functions:■A/D converter input■LED1■IR_TX40 GPIO: P14PWM2I Default direction: Input.After POR state: Input floating.Alternate function: A/D converter input GPIO: P38 I Default direction: Input.After POR state: Input floating.Alternate functions:■A/D converter input■MOSI (master and slave) for SPI_2■IR_TXTable 1-2.  Pin Descriptions (continued)Pin Name I/O Type Description
13 CYW20732S Bluetooth Low Energy SiP Module, Doc. # 002-15222 Rev. *GIntroduction41 GPIO: P15 I Default direction: Input.After POR state: Input floating.Alternate functions:■A/D converter input■IR_RX■60 Hz_main42 GPIO: P26PWM0I Default direction: Input.After POR state: Input floating.Drain current: 16 mAAlternate function: SPI_CS (slave only) for SPI_243aGPIO: P12 I Default direction: Input.After POR state: Input floating.Alternate functions:■A/D converter input■XTALO32KXTALO32K O Low-power oscillator (LPO) output.Alternate functions:P12P2644bGPIO: P11 I Default direction: Input.After POR state: Input floating.Alternate functions:■A/D converter input■XTALI32KXTALI32K I Low-power oscillator (LPO) input.Alternate functions:■P11■P2745 GND GND GND46 GND GND GND47 GND GND GND48 GND GND GNDa. When pin 43 (XTALO32K) is used, ADC/GPIO:P12 is unavailable. P26 may still be available.b. When pin 44 (XTALI32K) is used, ADC/GPIO:P11 is unavailable. P27 may still be available.Table 1-2.  Pin Descriptions (continued)Pin Name I/O Type Description
CYW20732S Bluetooth Low Energy SiP Module, Doc. # 002-15222 Rev. *G 14Introduction1.3 Electrical SpecificationsAbsolute maximum ratings are defined in Ta ble 1-3.Power for the CYW20732S module is provided by the host through the power pins.Based on the current measurements in Table 1-5   , CYW20732S peak power values are:■RX: 101.6 mW■TX: 101.6 mW■Sleep mode: 217.8 µW■Deep Sleep mode: 9.1 µWTable 1-3.  Absolute Maximum RatingsParameter Min. Max. UnitSupply power NA 3.63 VStorage temperature –40 125 °CVoltage ripple 0±2%Power supply (VBAT absolute maximum rating) 1.62 3.63 V Table 1-4.  VoltageSymbol Parameter Min. Typ. Max. UnitVBAT Battery voltage 1.62 – 3.63 VTable 1-5.  Current ConsumptionOperating Mode Condition Nominal Maximum UnitReceive Receiver and baseband are both operating, 100% 24.0 28.0 mATransmit  Transmitter and baseband are both operating, 100% 24.0 28.0 mASleep Wake in < 5 ms 55.0 60.0 µADeep Sleep Wake on interrupt 2.0 2.5 µANote: All measurements taken at 25°C
15 CYW20732S Bluetooth Low Energy SiP Module, Doc. # 002-15222 Rev. *GIntroduction1.4 RF SpecificationsCYW20732S receiver specifications are defined in Ta b l e 1 - 6 .RF transmitter specifications are defined in Ta b le 1-7.Table 1-6.  Receiver SpecificationsParameter Mode and Conditions Min. Typ. Max. UnitFrequency range – 2402 – 2480 MHzRX sensitivity (standard) Packets: 200Payload: PRBS 9Length: 37 BytesDirty Transmitter: off.PER: 30.8%– –94 – dBmMaximum input – –10 – – dBmNote: All measurements taken at 3.0V (default voltage)Table 1-7.  Transmitter SpecificationsParameter Min. Typ. Max. UnitTransmitterFrequency rangeaa. This parameter is taken from the Bluetooth 4.0 specification.2402 – 2480 MHzOutput power adjustment range –20 – 4 dBmOutput power –2–dBmOutput power variation – 2.5 – dBLO PerformanceInitial carrier frequency tolerance – – ±150 kHzFrequency DriftFrequency drift – – ±50 kHzDrift rate ––20kHz/50µsFrequency DeviationAverage deviation in payload(sequence: 00001111)225 – 275 kHzAverage deviation in payload(sequence: 10101010)185 – – kHzChannel spacing –2–MHz
CYW20732S Bluetooth Low Energy SiP Module, Doc. # 002-15222 Rev. *G 16Introduction1.5 ADC SpecificationsCYW20732S ADC specifications are defined in Table 1-8.Table 1-8.  ADC SpecificationsParameter Symbol Conditions Min. Typ. Max. UnitNumber of input channels – – – 9 – -Channel switching rate fch – – – 133.33 Kch/sInput signal range Vinp –0–3.63VReference settling time – Charging refsel 7.5 – – µsInput resistance Rinp Effective, single-ended – 500 – kInput capacitance Cinp –––5pFConversion rate Fc– 5.859 – 187 kHzConversion time Tc– 5.35 – 170.7 µsResolution R – 16 BitsAbsolute voltage measurement error – Using on–chip ADC firmware driver–±2–%Current I Iavdd1p2 + Iavdd3p3 ––1mAPower P – – 1.5 – mWLeakage Current  Ileakage T = 25°C – – 100 nAPower-up time  Tpowerup – – – 200 µsIntegral nonlinearity INL In the guaranteed performance range –1 – 1 LSBaa. LSBs are expressed at the 10-bit level.Differential nonlinearity DNL In the guaranteed performance range–1 – 1 LSB<Superscript>a
17 CYW20732S Bluetooth Low Energy SiP Module, Doc. # 002-15222 Rev. *GIntroduction1.6 Timing and AC Characteristics1.6.1 SPI TimingSPI interface timing is illustrated in Figure 1-4 and Figure 1-5 and are defined in Ta b l e 1-9   .Figure 1-4.  SPI Timing—Modes 0 and 2Figure 1-5.  SPI Timing—Modes 1 and 33SPI_CSNSPI_CLK(Mode0)SPI_MOSI ‐FirstBitSPI_MISO NotDriven FirstBitSecondBitSecondBitLastbitLastbit126SPI_CLK(Mode2)NotDriven‐543SPI_CSNSPI_CLK(Mode1)SPI_MOSI ‐InvalidbitSPI_MISO NotDriven InvalidbitFirstbitFirstbitLastbitLastbit126‐NotDrivenSPI_CLK(Mode3)54
CYW20732S Bluetooth Low Energy SiP Module, Doc. # 002-15222 Rev. *G 18Introduction1.6.2 BSC Interface TimingBSC interface timing is illustrated in Figure 1-6 and is defined in Table 1-10.Figure 1-6.  BSC Interface TimingTable 1-9.  SPI Interface Timing SpecificationsReference Characteristics Min. Typ. Max.1 Time from CSN asserted to first clock edge 1 SCK 100 2 Master setup time – 1/2SCK –3 Master hold time 1/2SCK - –4 Slave setup time – 1/2 SCK –5 Slave hold time 1/2 SCK – –6 Time from last clock edge to CSN deasserted SCK 10 SCK 100Table 1-10.  BSC Interface Timing SpecificationsReference Characteristics Min. Max. Unit1 Clock frequency – 100, 400, 800, 1000 kHz2 START condition setup time 650 – ns3 START condition hold time 280 – ns4 Clock low time 650 – ns5 Clock high time 280 – ns6 Data input hold time 0 – ns7 Data input setup time 100 – ns8 STOP condition setup time 280 – ns9 Output valid from clock – 400 ns10 Bus free time 650 – ns
19 CYW20732S Bluetooth Low Energy SiP Module, Doc. # 002-15222 Rev. *GIntroduction1.6.3 UART TimingUART timing is illustrated in Figure 1-7 and defined in Ta b l e 1 - 11.Figure 1-7.  UART TimingTable 1-11.  UART Timing SpecificationsReference Characteristics Min. Max. Unit1 Delay time, UART_CTS_N low to UART_TXD valid – 24 Baudout cycles2 Setup time, UART_CTS_N high before midpoint of stop bit – 10 ns3 Delay time, midpoint of stop bit to UART_RTS_N high – 2 Baudout cycles
CYW20732S Bluetooth Low Energy SiP Module, Doc. # 002-15222 Rev. *G 20Introduction1.7 PCB Design and Manufacturing Recommendations1.7.1 Pad and Solder Mask Opening DimensionsCYW20732S pad and solder mask opening dimensions are defined in Ta ble 1-12.1.7.2 PCB Layout Recommendations for Configuration AThe following layout recommendations are referenced to Figure 1-8:■Connect to system ground from side B of the module (pins 13–22).■An L-shaped ground plane is required for the embedded BLE antenna. Keep the GND continuous. Do not cut off the GND shape to accommodate trace routes.■If the L-shaped GND plane is located on the top layer of the PCB, do not place components on the ground plane. If this cannot be avoided, move the L-shaped ground plane to another layer.■Antenna efficiency of 31–41% can be achieved based on the layout in Figure 1-8 and the dimensions listed below. Follow-ing these layout recommendations is expected to yield 50+ meters of usable range; deviating from these recommenda-tions may reduce the range of the antenna.❐D: 4.5 mm (typical)❐G, H, S: 3 mm (typical)❐L: 3 mm (minimum)❐W: 0.4 mm (typical)■Route signal traces out of the module from side C (between pins 27 and 30) or side B (between pins 16 and 19) of the module. Traces can be overlapped to avoid routing through the keep-out area.■Do not route traces from side A or sideD.Table 1-12.  Pad and Solder Mask DimensionsPad Type Pad Dimensions Solder Mask Opening Dimensions UnitType A 0.6 × 0.25  0.7 × 0.35 mmType B 0.55 × 0.3 0.65 × 0.4Type C 0.4 × 0.4 0.5 × 0.5
21 CYW20732S Bluetooth Low Energy SiP Module, Doc. # 002-15222 Rev. *GIntroductionFigure 1-8.  PCB Layout Example, Configuration ANotes:■Side A indicates the side of Pin #1 - Pin #12 of the CYW20732S.■Side B indicates the side of Pin #13 - Pin #22 of the CYW20732S. ■Side C indicates the side of Pin #23 - Pin #34 of the CYW20732S.■Side D indicates the side of Pin #35 - Pin #44 of the CYW20732S.
CYW20732S Bluetooth Low Energy SiP Module, Doc. # 002-15222 Rev. *G 22Introduction1.7.2.1 Example of an L-Shaped Ground Plane Figure 1-9 shows an L-shaped ground arrangement in the 2nd layer (purple color) and the top-side component placementand trace routing (blue color). We can see that some components and routings are placing in the L-shaped area on the toplayer and the “L -shaped” ground is connected to system ground in the 2nd layer.Figure 1-9 also indicates the clearance area (marked in yellow) and L-shaped GND area (marked in green).Figure 1-9.  L-Shaped Ground PlaneFigure 1-10 shows an L -shaped ground (arranged in the 2nd layer) only.Figure 1-10.  L-Shaped Ground Plane, 2nd Layer
23 CYW20732S Bluetooth Low Energy SiP Module, Doc. # 002-15222 Rev. *GIntroduction1.7.3 PCB Layout Recommendations for Configuration BThe following layout recommendations are referenced to Figure 1-11:■Connect to system ground from side B of the module (pins 13–22).■An L-shaped ground plane is required for the embedded BLE antenna. Keep the GND continuous. Do not cut off the GND shape to accommodate trace routes.■If the L-shaped GND plane is located on the top layer of the PCB, do not place components on the ground plane. If this cannot be avoided, move the L-shaped ground plane to another layer.■Antenna efficiency of 31–41% can be achieved based on the layout in Figure 1-11 and the dimensions listed below. Fol-lowing these layout recommendations is expected to yield 50+ meters of usable range; deviating from these recommen-dations may reduce the range of the antenna.❐D: 4.5 mm (typical)❐G, H, S: 3 mm (typical)❐L: 3 mm (minimum)❐W: 0.4 mm (typical)■Route signal traces out of the module from side C (between pins 27 and 30) or side B (between pins 16 and 19) of the module. Traces can be overlapped to avoid routing through the keep-out area.■Do not route traces from side A or sideD.Figure 1-11.  PCB Layout Example, Configuration BNotes:■Side A indicates the side of Pin #1 - Pin #12 of the CYW20732S.■Side B indicates the side of Pin #13 - Pin #22 of the CYW20732S. ■Side C indicates the side of Pin #23 - Pin #34 of the CYW20732S.■Side D indicates the side of Pin #35 - Pin #44 of the CYW20732S.
CYW20732S Bluetooth Low Energy SiP Module, Doc. # 002-15222 Rev. *G 24Introduction1.7.4 Common Guidelines for CYW20732SIt is recommended to have a 0.4 mm gap between the chip's upper surface and the plastic housing (Figure 1-12). Figure 1-12.  Gap Between Chip’s Upper Surface and Plastic HousingArrange the GND plane under the module and connect the GND pins of the module to the GND plane as shown inFigure 1-14. Figure 1-13.  Example of Ground Plane Under the ModuleNote: Do not route the GND plane under the RF pin.If you are unable to reserve such a large GND plane, then use the minimal required area as shown in Figure 1-14.
25 CYW20732S Bluetooth Low Energy SiP Module, Doc. # 002-15222 Rev. *GIntroductionFigure 1-14.  Minimum Required Ground Plane1.7.5 PCB StencilThe recommended PCB stencil is shown in Figure 1-15 (all measurements in mm). Use an unsolder mask to set the modulefootprint.Figure 1-15.  CYW20732S Stencil (Bottom View)
CYW20732S Bluetooth Low Energy SiP Module, Doc. # 002-15222 Rev. *G 26Introduction1.7.6 Solder ReflowThe recommended solder reflow profile for the CYW20732S is defined in Figure 1-16.Figure 1-16.  Solder Reflow Profile245°C217°C200°C150°CTimeTemperaturePre‐Heating:90~120sec. Soldering:60~90sec.
27 CYW20732S Bluetooth Low Energy SiP Module, Doc. # 002-15222 Rev. *GIntroduction1.8 Packaging and Storage InformationThe CYW20732S is available in a tape and reel package and is shipped in an ESD-protected moisture-resistant (MSL-3) bagas shown in Figure 1-17. The storage temperature range is –40°C to +125°C.Figure 1-17.  CYW20732S ESD/Moisture PackagingThe moisture sensitivity label on the CYW20732S shipping bag is shown in Figure 1-18.Figure 1-18.  CYW20732S Moisture Sensitivity LabelFigure 1-19 shows the location of pin 1 on the CYW20732S relative to its orientation on the tape packaging.
CYW20732S Bluetooth Low Energy SiP Module, Doc. # 002-15222 Rev. *G 28IntroductionFigure 1-19.  CYW20732S Tape and Reel Pin 1 Location
29 CYW20732S Bluetooth Low Energy SiP Module, Doc. # 002-15222 Rev. *GIntroduction1.9 Mechanical InformationPackage dimensions for the CYW20732S are shown in Figure 1-20.Figure 1-20.  CYW20732S Package DimensionsAdditional CYW20732Spackage dimensions are shown in Figure 1-21.
CYW20732S Bluetooth Low Energy SiP Module, Doc. # 002-15222 Rev. *G 30IntroductionFigure 1-21.  CYW20732S Pin Dimensions (Bottom View)
31 CYW20732S Bluetooth Low Energy SiP Module, Doc. # 002-15222 Rev. *GIntroduction1.10 Ordering InformationTable 1-13.  Ordering InformationPart Number Package Operating Temperature HumidityCYW20732S 48-pin LGA –40°C to +85°C 95% max., noncondensing
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33 CYW20732S Bluetooth Low Energy SiP Module, Doc. # 002-15222 Rev. *GRevision History  Document Revision History Document Title: CYW20732S Bluetooth Low Energy SiP ModuleDocument Number: 002-15222Revision ECN# Issue Date Origin of Change Description of Change** - 10/02/2013 - MMP20732S-TRM100-R:Initial Release*A - 01/15/2014 - MMP20732S-TRM101-RUpdate document template*B - 03/04/2014 -MMP20732S-TRM102-RUpdated:■Table 2: “Pin Descriptions”.■“Technical Support” (added link to the WICED support community).■Section: Electrical Specifications, Table 4: “Voltage” *C - 05/13/2014 -MMP20732S-TRM103-RAdded:■Footnotes for pins 43 and 44 of Table 2: “Pin Descriptions” ■“PCB Layout Recommendations for Configuration A” ■“PCB Layout Recommendations for Configuration B” ■“Common Guidelines for CYW20732S” *D - 08/22/2014 -MMP20732S-TRM104-RUpdated:Table 2: “Pin Descriptions,” (pins 33 and 38).*E - 09/11/2014 -MMP20732S-TRM105-RUpdated:■Table 2: “Pin Descriptions”, pin 37 alternate functions.■“PCB Layout Recommendations for Configuration A”.■“PCB Layout Recommendations for Configuration B”.Removed:Appendix A: “Acronyms and Abbreviations”.*F - 03/24/2016 -MMP20732S-TRM106-RUpdated:Table 5, “Current Consumption”*G 5560143 01/27/2017 UTSV Updated to Cypress Template.

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